Tomasz S. Czajkowski

According to our database, Tomasz S. Czajkowski authored at least 21 papers between 2004 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

RoDMap: A Reserve-on-Demand Mapper for Spatially-Configured Coarse-Grained Reconfigurable Arrays.

Kyle Zhao Bin Chen, Tarek S. Abdelrahman, Reza Azimi, Tomasz S. Czajkowski, Maziar Goudarzi

Proceedings of the 53rd International Conference on Parallel Processing, 2024

2023

ACPO: AI-Enabled Compiler-Driven Program Optimization.

Amir H. Ashouri, Muhammad Asif Manzoor, Duc Minh Vu, Raymond Zhang, Ziwen Wang, Angel Zhang, Bryan Chan, Tomasz S. Czajkowski, Yaoqing Gao

CoRR, 2023

Efficient Data Streaming for a Tightly-Coupled Coarse-Grained Reconfigurable Array.

Mahdi Abbaszadeh, Tarek S. Abdelrahman, Reza Azimi, Tomasz S. Czajkowski, Maziar Goudarzi

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

2018

Real-Time Simulation of Animated Characters Crowd in Unreal Engine 4.

Michal Rosenbeiger, Artur Bak, Tomasz S. Czajkowski

Proceedings of the Computer Vision and Graphics - International Conference, 2018

Modeling and Rendering of Volumetric Clouds in Real-Time with Unreal Engine 4.

Lukasz Nowak, Artur Bak, Tomasz S. Czajkowski, Konrad Wojciechowski

Proceedings of the Computer Vision and Graphics - International Conference, 2018

High-level synthesis of software-customizable floating-point cores.

Samridhi Bansal, Hsuan Hsiao, Tomasz S. Czajkowski, Jason Helge Anderson

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2015

High-Level Design Tools for Floating Point FPGAs.

Deshanand P. Singh, Bogdan Pasca, Tomasz S. Czajkowski

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Silicon Verification using High-Level Design Tools (Abstract Only).

Tomasz S. Czajkowski

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014

Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis.

Blair Fort, Andrew Canis, Jongsok Choi, Nazanin Calagar, Ruolong Lian, Stefan Hadjis, Yu Ting Chen, Mathew Hall, Bain Syrowik, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson

Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014

2013

LegUp: An open-source high-level synthesis tool for FPGA-based processor/accelerator systems.

Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zhang, Ahmed Kammoona, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson

ACM Trans. Embed. Comput. Syst., 2013

Harnessing the power of FPGAs using altera's OpenCL compiler.

Deshanand P. Singh, Tomasz S. Czajkowski, Andrew C. Ling

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

From software to accelerators with LegUp high-level synthesis.

Andrew Canis, Jongsok Choi, Blair Fort, Ruolong Lian, Qijing Huang, Nazanin Calagar, Marcel Gort, Jia Jun Qin, Mark Aldham, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson

Proceedings of the International Conference on Compilers, 2013

2012

From opencl to high-performance hardware on FPGAS.

Tomasz S. Czajkowski, Utku Aydonat, Dmitry Denisenko, John Freeman, Michael Kinsner, David Neto, Jason Wong, Peter Yiannacouras, Deshanand P. Singh

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Impact of FPGA architecture on resource sharing in high-level synthesis.

Stefan Hadjis, Andrew Canis, Jason Helge Anderson, Jongsok Choi, Kevin Nam, Stephen Dean Brown, Tomasz S. Czajkowski

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

Impact of Cache Architecture and Interface on Performance and Area of FPGA-Based Processor/Parallel-Accelerator Systems.

Jongsok Choi, Kevin Nam, Andrew Canis, Jason Helge Anderson, Stephen Dean Brown, Tomasz S. Czajkowski

Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011

LegUp: high-level synthesis for FPGA-based processor/accelerator systems.

Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zhang, Ahmed Kammoona, Jason Helge Anderson, Stephen Dean Brown, Tomasz S. Czajkowski

Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

2010

Decomposition-Based Vectorless Toggle Rate Computation for FPGA Circuits.

Tomasz S. Czajkowski, Stephen Dean Brown

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

2008

Functionally Linear Decomposition and Synthesis of Logic Circuits for FPGAs.

Tomasz S. Czajkowski, Stephen Dean Brown

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Fast toggle rate computation for FPGA circuits.

Tomasz S. Czajkowski, Stephen Dean Brown

Proceedings of the FPL 2008, 2008

2007

Using Negative Edge Triggered FFs to Reduce Glitching Power in FPGA Circuits.

Tomasz S. Czajkowski, Stephen Dean Brown

Proceedings of the 44th Design Automation Conference, 2007

2004

A synthesis oriented omniscient manual editor.

Tomasz S. Czajkowski, Jonathan Rose

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004