Tomás Lang
According to our database1,
Tomás Lang
authored at least 119 papers
between 1975 and 2012.
Collaborative distances:
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Bibliography
2012
IEEE Trans. Computers, 2012
IET Comput. Digit. Tech., 2012
2009
Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009
2007
IEEE Trans. Computers, 2007
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007
2006
IEEE Trans. Computers, 2006
2005
IEEE Trans. Computers, 2005
Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005
Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture.
Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005
2004
2003
J. VLSI Signal Process., 2003
IEEE Trans. Computers, 2003
Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm".
IEEE J. Solid State Circuits, 2003
2002
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002
2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
IEEE Trans. Computers, 2001
Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001
Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation.
Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001
Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001
2000
J. VLSI Signal Process., 2000
Reciprocation, Square Root, Inverse Square Root, and Some Elementary Functions Using Small Multipliers.
IEEE Trans. Computers, 2000
IEEE Trans. Computers, 2000
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000
1999
Very High Radix Square Root with Prescaling and Rounding and a Combined Division/Square Root Unit.
IEEE Trans. Computers, 1999
IEEE Trans. Computers, 1999
Proceedings of the IEEE International Conference On Computer Design, 1999
Multilevel Reverse-Carry Computation for Comparison and for Sign and Overflow Detection in Addition.
Proceedings of the IEEE International Conference On Computer Design, 1999
Proceedings of the 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 1999
Proceedings of the 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 1999
1998
J. VLSI Signal Process., 1998
IEEE Trans. Very Large Scale Integr. Syst., 1998
Computation of sqrt(x/d) in a Very High Radix Combined Division/Square-Root Unit with Scaling.
IEEE Trans. Computers, 1998
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
Extension of the working-zone-encoding method to reduce the energy on the microprocessor data bus.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
Leading-one prediction scheme for latency improvement in single datapath floating-point adders.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
1997
IEEE Trans. Computers, 1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997
1996
J. VLSI Signal Process., 1996
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996
Proceedings of the Euro-Par '96 Parallel Processing, 1996
1995
IEEE Trans. Computers, 1995
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995
Proceedings of the 1995 International Conference on Acoustics, 1995
Very-high radix combined division and square root with prescaling and selection by rounding.
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH-12 '95), 1995
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH-12 '95), 1995
1994
IEEE Trans. Computers, 1994
MOB forms: a class of multilevel block algorithms for dense linear algebra operations.
Proceedings of the 8th international conference on Supercomputing, 1994
1993
Microprocess. Microprogramming, 1993
Integr., 1993
Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993
Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993
1992
A method for implementation of one-dimensional systolic algorithms with data contraflow using pipelined functional units.
J. VLSI Signal Process., 1992
IEEE Trans. Computers, 1992
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992
Proceedings of the 6th international conference on Supercomputing, 1992
MAMACG: a tool for automatic mapping of matrix algorithms onto mesh array computational graphs.
Proceedings of the Application Specific Array Processors, 1992
1991
J. VLSI Signal Process., 1991
Architectural Support for Reduced Register Saving / Restoring in Single-Window Register Files.
ACM Trans. Comput. Syst., 1991
Module to Perform Multiplication, Division, and Square Root in Systolic Arrays for Matrix Computations.
J. Parallel Distributed Comput., 1991
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991
Mapping QR decomposition of a banded matrix on a ID systolic array with data contraflow and pipelined functional units.
Proceedings of the Algorithms and Parallel VLSI Architectures II, 1991
Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991
1990
IEEE Trans. Computers, 1990
J. Parallel Distributed Comput., 1990
FCP Sequential Abstract Machine Characteristics for the Systems Development Workload.
Proceedings of the Logic Programming, Proceedings of the 1990 North American Conference, Austin, Texas, USA, October 29, 1990
Architectural Support for the Management of Tightly-Coupled Fine-Grain Goals in Flat Concurrent Prolog.
Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990
Proceedings of the Proceedings IEEE INFOCOM '90, 1990
The Performance of a Faulty Multistage Interconnection Network with Diverting Switches and Correction Links.
Proceedings of the 1990 International Conference on Parallel Processing, 1990
Proceedings of the Application Specific Array Processors, 1990
1989
IEEE Trans. Acoust. Speech Signal Process., 1989
Multistage Networks Including Traffic with Real-Time Constraints.
Proceedings of the International Conference on Parallel Processing, 1989
Proceedings of the 9th Symposium on Computer Arithmetic, 1989
1988
Graph-based Partitioning of Matrix Algorithms for Systolic Arrays: Application to Transitive Closure.
Proceedings of the International Conference on Parallel Processing, 1988
Nonuniform Traffic Spots in Multistage Interconnection Networks.
Proceedings of the International Conference on Parallel Processing, 1988
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988
1987
IEEE Trans. Computers, 1987
A block-and-actions generator as an alternative to a simulator for collecting architecture measurements.
Proceedings of the Symposium on Interpreters and Interpretive Techniques, 1987, St. Paul, Minnesota, USA, June 24, 1987
1986
SIGARCH Comput. Archit. News, 1986
Replication and Pipelining in Multiple-Instance Algorithms.
Proceedings of the International Conference on Parallel Processing, 1986
1985
Proceedings of the 7th IEEE Symposium on Computer Arithmetic, 1985
1983
Inf. Process. Lett., 1983
Proceedings of the International Conference on Measurements and Modeling of Computer Systems, 1983
1982
IEEE Trans. Computers, 1982
1978
IEEE Trans. Computers, 1978
IBM J. Res. Dev., 1978
1977
IBM J. Res. Dev., 1977
Proceedings of the 1977 annual conference, 1977
1976
Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network.
IEEE Trans. Computers, 1976
Inf. Process. Lett., 1976
1975
Proceedings of the International Conference on Very Large Data Bases, 1975