Tom Ishikawa

According to our database, Tom Ishikawa authored at least 1 paper in 1994.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1994

A 2.5 V CMOS delay-locked loop for 18 Mbit, 500 megabyte/s DRAM.

Thomas H. Lee, Kevin S. Donnelly, John T. C. Ho, Jared Zerbe, Mark Johnson, Tom Ishikawa

IEEE J. Solid State Circuits, December, 1994