Tom Davidson

Orcid: 0000-0001-8059-6235

According to our database1, Tom Davidson authored at least 14 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
AI capabilities can be significantly improved without expensive retraining.
CoRR, 2023

2015
Identification of Dynamic Circuit Specialization Opportunities in RTL Code.
ACM Trans. Reconfigurable Technol. Syst., 2015

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration.
Microprocess. Microsystems, 2015

2014
Improving reconfiguration speed for dynamic circuit specialization using placement constraints.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Data path analysis for dynamic circuit specialisation.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Performance Evaluation of Dynamic Circuit Specialization on Xilinx FPGAs.
Proceedings of the FPGA World Conference 2014, 2014

2013
How to efficiently implement dynamic circuit specialization systems.
ACM Trans. Design Autom. Electr. Syst., 2013

Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012
Dynamic Circuit Specialisation for Key-Based Encryption Algorithms and DNA Alignment.
Int. J. Reconfigurable Comput., 2012

Smart technologies for effective reconfiguration: The FASTER approach.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

Novel Design Methods and a Tool Flow for Unleashing Dynamic Reconfiguration.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

2011
A Dynamically Reconfigurable Pattern Matcher for Regular Expressions on FPGA.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

2010
Run-Time Reconfiguration for Automatic Hardware/Software Partitioning.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

2009
Applying Parameterizable Dynamic Configurations to Sequence Alignment.
Proceedings of the Parallel Computing: From Multicores and GPU's to Petascale, 2009


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