Tolulope A. Odetola
Orcid: 0000-0002-6199-6249
According to our database1,
Tolulope A. Odetola
authored at least 20 papers
between 2016 and 2023.
Collaborative distances:
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Bibliography
2023
FM-ModComp: Feature Map Modification and Hardware-Software Co-Comparison for secure hardware accelerator-based CNN inference.
Microprocess. Microsystems, July, 2023
StAIn: Stealthy Avenues of Attacks on Horizontally Collaborated Convolutional Neural Network Inference and Their Mitigation.
IEEE Access, 2023
2022
2L-3W: 2-Level 3-Way Hardware-Software Co-verification for the Mapping of Convolutional Neural Network (CNN) onto FPGA Boards.
SN Comput. Sci., 2022
Contact Tracing Strategies for COVID-19 Prevention and Containment: A Scoping Review.
Big Data Cogn. Comput., 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Hardening Hardware Accelerartor Based CNN Inference Phase Against Adversarial Noises.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
SoWaF: Shuffling of Weights and Feature Maps: A Novel Hardware Intrinsic Attack (HIA) on Convolutional Neural Network (CNN).
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
CoRR, 2020
Deployment of Object Detection Enhanced with Multi-label Multi-classification on Edge Device.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
2019
2L-3W: 2-Level 3-Way Hardware-Software Co-Verification for the Mapping of Deep Learning Architecture (DLA) onto FPGA Boards.
CoRR, 2019
A Scalable Multilabel Classification to Deploy Deep Learning Architectures For Edge Devices.
CoRR, 2019
A Stealthy Hardware Trojan Exploiting the Architectural Vulnerability of Deep Learning Architectures: Input Interception Attack (IIA).
CoRR, 2019
(HIADIoT): Hardware Intrinsic Attack Detection in Internet of Things; Leveraging Power Profiling.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2016
Development of a competitive and collaborative platform for block diagram and resistive circuit reduction in a basic electrical engineering course.
Proceedings of the 2016 IEEE Global Engineering Education Conference, 2016