Tokuya Osawa

According to our database, Tokuya Osawa authored at least 3 papers between 1995 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

A Continuous-Adaptive DDRx Interface with Flexible Round-Trip-Time and Full Self Loop-Backed AC Test.

Masaru Haraguchi, Tokuya Osawa, Akira Yamazaki, Chikayoshi Morishima, Toshinori Morihara, Yoshikazu Morooka, Yoshihiro Okuno, Kazutami Arimoto

IEICE Trans. Electron., 2009

2007

A Continuous-Adaptive DDR2 Interface with Flexible Round-Trip-Time and Full Self Loop-Backed AC Test.

Masaru Haraguchi, Tokuya Osawa, Akira Yamazaki, Chikayoshi Morishima, Toshinori Morihara, Yoshikazu Morooka, Yoshihiro Okuno, Kazutami Arimoto

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

1995

A novel memory cell for multiport RAM on 0.5 μm CMOS Sea-of-Gates.

Koji Nii, Hideshi Maeno, Tokuya Osawa, Shuhei Iwade, Shinpei Kayano, Hiroshi Shibata

IEEE J. Solid State Circuits, March, 1995