Tobias Seufert

According to our database, Tobias Seufert authored at least 9 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Hierarchical Stochastic SAT and Quality Assessment of Logic Locking.

Christoph Scholl, Tobias Seufert, Fabian Siegwolf

Proceedings of the 27th International Conference on Theory and Applications of Satisfiability Testing, 2024

2023

Everything You Always Wanted to Know About Generalization of Proof Obligations in PDR.

Tobias Seufert, Felix Winterer, Christoph Scholl, Karsten Scheibler, Tobias Paxian, Bernd Becker

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

On safety verification using PDR and Reverse PDR.

Tobias Seufert

PhD thesis, 2023

2022

Making PROGRESS in Property Directed Reachability.

Tobias Seufert, Christoph Scholl, Arun Chandrasekharan, Sven Reimer, Tobias Welp

Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2022

2021

ICP and IC3 with Stronger Generalization.

Felix Winterer, Tobias Seufert, Karsten Scheibler, Tino Teige, Chritsoph Scholl, Bernd Becker

Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2021

ICP and IC3.

Karsten Scheibler, Felix Winterer, Tobias Seufert, Tino Teige, Christoph Scholl, Bernd Becker

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2019

fbPDR: In-depth combination of forward and backward analysis in Property Directed Reachability.

Tobias Seufert, Christoph Scholl

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Combining PDR and reverse PDR for hardware model checking.

Tobias Seufert, Christoph Scholl

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Sequential Verification Using Reverse PDR.

Tobias Seufert, Christoph Scholl

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2017