Tobias Grosser

Orcid: 0000-0003-3874-6003

According to our database1, Tobias Grosser authored at least 64 papers between 2010 and 2024.

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Bibliography

2024
Guided Equality Saturation.
Proc. ACM Program. Lang., January, 2024

Falcon: A Scalable Analytical Cache Model.
Proc. ACM Program. Lang., 2024

Compressing Structured Tensor Algebra.
CoRR, 2024

Transforming Optimization Problems into Disciplined Convex Programming Form.
Proceedings of the Intelligent Computer Mathematics - 17th International Conference, 2024

Verifying Peephole Rewriting in SSA Compiler IRs.
Proceedings of the 15th International Conference on Interactive Theorem Proving, 2024

Strided Difference Bound Matrices.
Proceedings of the Computer Aided Verification - 36th International Conference, 2024

A shared compilation stack for distributed-memory parallelism in stencil DSLs.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

PipeGen: Automated Transformation of a Single-Core Pipeline into a Multicore Pipeline for a Given Memory Consistency Model.
Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques, 2024

2023
Sidekick compilation with xDSL.
CoRR, 2023

Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

Fortran performance optimisation and auto-parallelisation by leveraging MLIR-based domain specific abstractions in Flang.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023


mlirSynth: Automatic, Retargetable Program Raising in Multi-Level IR Using Program Synthesis.
Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023

2022
Work-Stealing Prefix Scan: Addressing Load Imbalance in Large-Scale Image Registration.
IEEE Trans. Parallel Distributed Syst., 2022

OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

CONVOLVE: Smart and seamless design of smart edge processors.
CoRR, 2022

TensorFlow as a DSL for stencil-based computation on the Cerebras Wafer Scale Engine.
CoRR, 2022

MOM: Matrix Operations in MLIR.
CoRR, 2022

IRDL: an IR definition language for SSA compilers.
Proceedings of the PLDI '22: 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation, San Diego, CA, USA, June 13, 2022

Metamorphic Fuzzing of C++ Libraries.
Proceedings of the 15th IEEE Conference on Software Testing, Verification and Validation, 2022

Exploring the Suitability of the Cerebras Wafer Scale Engine for Stencil-Based Computation Codes.
Proceedings of the Euro-Par 2022: Parallel Processing Workshops, 2022

Lambda the Ultimate SSA: Optimizing Functional Programs in SSA.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2022

QSSA: an SSA-based IR for Quantum computing.
Proceedings of the CC '22: 31st ACM SIGPLAN International Conference on Compiler Construction, Seoul, South Korea, April 2, 2022

QRANE: lifting QASM programs to an affine IR.
Proceedings of the CC '22: 31st ACM SIGPLAN International Conference on Compiler Construction, Seoul, South Korea, April 2, 2022

Understanding and exploiting optimal function inlining.
Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

2021
Domain-Specific Multi-Level IR Rewriting for GPU: The Open Earth Compiler for GPU-accelerated Climate Simulation.
ACM Trans. Archit. Code Optim., 2021

FPL: fast Presburger arithmetic through transprecision.
Proc. ACM Program. Lang., 2021

LoopOpt: Declarative Transformations Made Easy.
Proceedings of the SCOPES '21: 24th International Workshop on Software and Compilers for Embedded Systems, Eindhoven, The Netherlands, November 1, 2021

Extracting clean performance models from tainted programs.
Proceedings of the PPoPP '21: 26th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2021

Cross-domain compilation: exploiting synergies across the CS community (keynote).
Proceedings of the VMIL 2021: Proceedings of the 13th ACM SIGPLAN International Workshop on Virtual Machines and Intermediate Languages, 2021

Dreaming up Metamorphic Relations: Experiences from Three Fuzzer Tools.
Proceedings of the 6th IEEE/ACM International Workshop on Metamorphic Testing, 2021

Progressive Raising in Multi-level IR.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2021

2020
Optimization Approach to Accelerator Codesign.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Polyhedral Compilation for Racetrack Memories.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Declarative Loop Tactics for Domain-specific Optimization.
ACM Trans. Archit. Code Optim., 2020

Fast linear programming through transprecision computing on small and sparse data.
Proc. ACM Program. Lang., 2020

Domain-Specific Multi-Level IR Rewriting for GPU.
CoRR, 2020

Compiling Neural Networks for a Computational Memory Accelerator.
CoRR, 2020

LLHD: a multi-level intermediate representation for hardware description languages.
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020

Mixed-data-model heterogeneous compilation and OpenMP offloading.
Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020

Automatic Generation of Multi-Objective Polyhedral Compiler Transformations.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019
A fast analytical model of fully associative caches.
Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation, 2019

Efficient hierarchical online-autotuning: a case study on polyhedral accelerator mapping.
Proceedings of the ACM International Conference on Supercomputing, 2019

Absinthe: Learning an Analytical Performance Model to Fuse and Tile Stencil Codes in One Shot.
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019

2018
High-Performance Generalized Tensor Operations: A Compiler-Oriented Approach.
ACM Trans. Archit. Code Optim., 2018

DeLICM: scalar dependence removal at zero memory cost.
Proceedings of the 2018 International Symposium on Code Generation and Optimization, 2018

Modeling the conflicting demands of parallelism and Temporal/Spatial locality in affine scheduling.
Proceedings of the 27th International Conference on Compiler Construction, 2018

2017
Accelerator Codesign as Non-Linear Optimization.
CoRR, 2017

Simple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils.
Proceedings of the 22nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2017

Optimistic loop optimization.
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017

2016
Polly-ACC Transparent compilation to heterogeneous hardware.
Proceedings of the 2016 International Conference on Supercomputing, 2016

2015
Polyhedral AST Generation Is More Than Scanning Polyhedra.
ACM Trans. Program. Lang. Syst., 2015

Runtime pointer disambiguation.
Proceedings of the 2015 ACM SIGPLAN International Conference on Object-Oriented Programming, 2015

MODESTO: Data-centric Analytic Optimization of Complex Stencil Programs on Heterogeneous Architectures.
Proceedings of the 29th ACM on International Conference on Supercomputing, 2015

Optimistic Delinearization of Parametrically Sized Arrays.
Proceedings of the 29th ACM on International Conference on Supercomputing, 2015

PENCIL: A Platform-Neutral Compute Intermediate Language for Accelerator Programming.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014
A decoupled approach to high-level loop optimization : tile shapes, polyhedral building blocks and low-level compilers. (Une approche découplée pour l'optimization de boucle à haut niveau).
PhD thesis, 2014

The Relation Between Diamond Tiling and Hexagonal Tiling.
Parallel Process. Lett., 2014

A framework for enhancing data reuse via associative reordering.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2014

Hybrid Hexagonal/Classical Tiling for GPUs.
Proceedings of the 12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014

2013
PENCIL: Towards a Platform-Neutral Compute Intermediate Language for DSLs
CoRR, 2013

Split tiling for GPUs: automatic parallelization using trapezoidal tiles.
Proceedings of the 6th Workshop on General Purpose Processor Using Graphics Processing Units, 2013

2012
Polly - Performing Polyhedral Optimizations on a Low-Level Intermediate Representation.
Parallel Process. Lett., 2012

2010
Determining optimal features for emotion recognition from speech by applying an evolutionary algorithm.
Proceedings of the 11th Annual Conference of the International Speech Communication Association, 2010


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