Tiziano Villa
Orcid: 0000-0002-9671-8804Affiliations:
- University of Verona, Italy
- University of California Berkeley, CA, USA (PhD 1995)
According to our database1,
Tiziano Villa
authored at least 102 papers
between 1989 and 2024.
Collaborative distances:
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Bibliography
2024
2023
Generation of synchronizing state machines from a transition system: A region-based approach.
Int. J. Appl. Math. Comput. Sci., 2023
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023
2022
IEEE Trans. Computers, 2022
Inf. Sci., 2022
Proceedings of the Runtime Verification - 22nd International Conference, 2022
Proceedings of the 27th IEEE International Conference on Emerging Technologies and Factory Automation, 2022
Decomposition of transition systems into sets of synchronizing Free-choice Petri Nets.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
Proceedings of the Short Paper Proceedings of the 4th Workshop on Artificial Intelligence and Formal Verification, 2022
2021
Formal Methods Syst. Des., 2021
Proceedings of the 3rd Workshop on Artificial Intelligence and Formal Verification, 2021
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
2020
Proceedings of the Proceedings 11th International Symposium on Games, 2020
Proceedings of the 27th International Symposium on Temporal Representation and Reasoning, 2020
Proceedings of the HSCC '20: 23rd ACM International Conference on Hybrid Systems: Computation and Control, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the Business Process Management Workshops, 2020
Dynamic Controllability and (J, K)-Resiliency in Generalized Constraint Networks with Uncertainty.
Proceedings of the Thirtieth International Conference on Automated Planning and Scheduling, 2020
2019
IEEE Trans. Computers, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Numerical Software Verification - 12th International Workshop, 2019
Proceedings of the 26th IEEE Symposium on Computer Arithmetic, 2019
Proceedings of the 1st Workshop on Artificial Intelligence and Formal Verification, 2019
Proceedings of the 1st Workshop on Artificial Intelligence and Formal Verification, 2019
Proceedings of the 1st Workshop on Artificial Intelligence and Formal Verification, 2019
2018
ACM Trans. Cyber Phys. Syst., 2018
Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods.
Microprocess. Microsystems, 2018
Hardware realization of residue number system algorithms by Boolean functions minimization.
CoRR, 2018
2017
Proceedings of the Testing Software and Systems, 2017
2016
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
2015
A Platform-Based Design Methodology With Contracts and Related Tools for the Design of Cyber-Physical Systems.
Proc. IEEE, 2015
Design Automation of Electronic Systems: Past Accomplishments and Challenges Ahead [Scanning the Issue].
Proc. IEEE, 2015
Microprocess. Microsystems, 2015
Deriving Compositionally Deadlock-Free Components over Synchronous Automata Compositions.
Comput. J., 2015
Proceedings of the Software Engineering and Formal Methods, 2015
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015
2014
Deterministic Timed Finite State Machines: Equivalence Checking and Expressive Power.
Proceedings of the Proceedings Fifth International Symposium on Games, 2014
Verification of Robotic Surgery Tasks by Reachability Analysis: A Comparison of Tools.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
2013
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Proceedings of the 2013 Federated Conference on Computer Science and Information Systems, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Ariadne: Dominance Checking of Nonlinear Hybrid Automata Using Reachability Analysis.
Proceedings of the Reachability Problems - 6th International Workshop, 2012
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the 4th IFAC Conference on Analysis and Design of Hybrid Systems, 2012
2011
Proceedings of the 7th International Wireless Communications and Mobile Computing Conference, 2011
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
2010
Proceedings of the Boolean Models and Methods in Mathematics, 2010
Proceedings of the Boolean Models and Methods in Mathematics, 2010
2009
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Discret. Event Dyn. Syst., 2008
2007
A new algorithm for the largest compositionally progressive solution of synchronous language equations.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the 2nd IFAC Conference on Analysis and Design of Hybrid Systems, 2006
2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Proceedings of the 43rd IEEE Conference on Decision and Control, 2004
2002
Equisolvability of Series vs. Controller's Topology in Synchronous Language Equations.
Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002
Proceedings of the 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), 2002
2001
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001
2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
Proceedings of the Hybrid Systems: Computation and Control, Third International Workshop, 2000
Proceedings of the American Control Conference, 2000
1999
Aura II: Combining Negative Thinking and Branch-and-Bound in Unate Covering Problems.
Proceedings of the VLSI: Systems on a Chip, 1999
1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
IEEE Trans. Computers, 1998
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998
1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
1996
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996
Proceedings of the Computer Aided Verification, 8th International Conference, 1996
1995
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995
1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
Proceedings of the 31st Conference on Design Automation, 1994
1992
Proceedings of the conference on European design automation, 1992
1991
Proceedings of the 28th Design Automation Conference, 1991
1990
NOVA: state assignment of finite state machines for optimal two-level logic implementation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990
1989
NOVA: State Assignment of Finite State Machines for Optimal Two-level Logic Implementations.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989