Ting-Yang Wang

According to our database, Ting-Yang Wang authored at least 2 papers between 2015 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A 71. 4dB SNDR 30MHz BW Continuous-Time Delta-sigma Modulator Using a Time-Interleaved Noise-Shaping Quantizer in 12-nm CMOS.

Chan-Hsiang Weng, Tzu-An Wei, Hung-Yi Hsieh, Su-Hao Wu, Ting-Yang Wang

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2015

A 84.7-DR wide BW incremental ADC using CT structure.

Ting-Yang Wang, Tai-Cheng Lee

Proceedings of the VLSI Design, Automation and Test, 2015