Ting Wei Chiang

According to our database, Ting Wei Chiang authored at least 2 papers in 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

An efficient gate delay model for VLSI design.

Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen

Proceedings of the 25th International Conference on Computer Design, 2007

A technique for selecting CMOS transistor orders.

Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen

Proceedings of the 25th International Conference on Computer Design, 2007