Timon Evenblij
Orcid: 0000-0002-5337-0617
According to our database1,
Timon Evenblij
authored at least 7 papers
between 2019 and 2024.
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Bibliography
2024
Bank on Compute-Near-Memory: Design Space Exploration of Processing-Near-Bank Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2024
2023
Exploring Pareto-Optimal Hybrid Main Memory Configurations Using Different Emerging Memories.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2023
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023
2022
Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2021
Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2019
A Comparative Analysis on the Impact of Bank Contention in STT-MRAM and SRAM Based LLCs.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019