Timo Hämäläinen

Elizaveta Rastorgueva-Foi

Proceedings of the 13th Mediterranean Conference on Embedded Computing, 2024

An Efficient High-level Synthesis Implementation of the MUSIC DoA Algorithm for FPGA.

[BibT_eX]

[DOI]

Sakari Lahti

Tuomas Aaltonen

Jukka Talvitie

Bo Tan

Proceedings of the 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems, 2024

Atalanta: Open-Source RISC-V Microcontroller for Rust-Based Hard Real-Time Systems.

[BibT_eX]

[DOI]

Proceedings of the Architecture of Computing Systems - 37th International Conference, 2024

2023

Leveraging Modern C++ in High-Level Synthesis.

[BibT_eX]

[DOI]

Sakari Lahti

Matti Rintala

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

Does SoC Hardware Development Become Agile by Saying So: A Literature Review and Mapping Study.

[BibT_eX]

[DOI]

Antti Rautakoura

ACM Trans. Embed. Comput. Syst., 2023

Memory Mapped I/O Register Test Case Generator for Large Systems-on-Chip.

[BibT_eX]

[DOI]

Roni Hämäläinen

Henri Lunnikivi

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

AnTiQ: A Hardware-Accelerated Priority Queue Design with Constant Time Arbitrary Element Removal.

[BibT_eX]

[DOI]

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2022

High-Level Synthesis Implementation of an Embedded Real-Time HEVC Intra Encoder on FPGA for Media Applications.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2022

Python API for Kactus2 IP-XACT tool.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022

Ballast: Implementation of a Large MP-SoC on 22nm ASIC Technology.

[BibT_eX]

[DOI]

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

A Resilient System Design to Boot a RISC-V MPSoC.

[BibT_eX]

[DOI]

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021

A model of architecture for estimating GPU processing performance and power.

[BibT_eX]

[DOI]

Saman Payvar

Maxime Pelcat

Des. Autom. Embed. Syst., 2021

A Survey on System-on-a-Chip Design Using Chisel HW Construction Language.

[BibT_eX]

[DOI]

Matti Käyrä

Proceedings of the IECON 2021, 2021

Framework for Creating Relevant, Accessible, and Adoptable KPI Models in an Industrial Setting.

[BibT_eX]

[DOI]

Arttu Leppäkoski

Outi Sievi-Korte

Daniel Mueller-Gritschneder

Proceedings of the Software Business - 12th International Conference, 2021

Automated HW/SW co-design for edge AI: state, challenges and steps ahead.

[BibT_eX]

[DOI]

Muhammad Abdullah Hanif

Michael J. Klaiber

Paul Palomero Bernardo

Sebastian Siegfried Prebeck

Muhammad Shafique

Proceedings of the CODES/ISSS 2021, 2021

2020

Transpiling Python to Rust for Optimized Performance.

[BibT_eX]

[DOI]

Henri Lunnikivi

Kai Jylkkä

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

Implementation of a Nonlinear Self-Interference Canceller using High-Level Synthesis.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Deployment of Batch Processing for Log File Analysis.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Industrial Cyberphysical Systems, 2020

Kamel: IP-XACT compatible intermediate meta-model for IP generation.

[BibT_eX]

[DOI]

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019

Are We There Yet? A Study on the State of High-Level Synthesis.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Feasibility of FPGA accelerated IPsec on cloud.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2019

Visualization of Dynamic Resource Allocation for HEVC Encoding in FPGA-Accelerated SDN Cloud.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Visual Communications and Image Processing, 2019

Dynamic Resource Allocation for HEVC Encoding in FPGA-Accelerated SDN Cloud.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019

Instruction Extension of a RISC-V Processor Modeled with IP-XACT.

[BibT_eX]

[DOI]

Saman Payvar

Daniel Mueller-Gritschneder

Rafael Stahl

Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019

2018

Open framework for error-compensated gaze data collection with eye tracking glasses.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Symposium on Multimedia, 2018

Eye-Controlled Region of Interest HEVC Encoding.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Symposium on Multimedia, 2018

Live Demonstration: Kvazzup 4K HEVC Video Call.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Symposium on Multimedia, 2018

Live Demonstration: 4K100p HEVC Intra Encoder.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

FPGA-Powered 4K120p HEVC Intra Encoder.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Low Latency Edge Rendering Scheme for Interactive 360 Degree Virtual Reality Gaming.

[BibT_eX]

[DOI]

Proceedings of the 38th IEEE International Conference on Distributed Computing Systems, 2018

Visualization of Memory Map Information in Embedded System Design.

[BibT_eX]

[DOI]

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Modeling RISC-V Processor in IP-XACT.

[BibT_eX]

[DOI]

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Rate-Distortion-Complexity Optimized Coding Scheme for Kvazaar HEVC Intra Encoder.

[BibT_eX]

[DOI]

Proceedings of the 2018 Data Compression Conference, 2018

2017

The Effect of Hardware-Computed Travel Time on Localization Accuracy in the Inversion of Experimental (Acoustic) Waveform Data.

[BibT_eX]

[DOI]

Mika Takala

Sampsa Pursiainen

IEEE Trans. Computational Imaging, 2017

Kactus2: A graphical EDA tool built on the IP-XACT standard.

[BibT_eX]

[DOI]

J. Open Source Softw., 2017

Kvazaar 4K HEVC intra encoder on FPGA accelerated airframe server.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

Kvazaar: HEVC/H.265 4K30p Intra Encoder.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Symposium on Multimedia, 2017

Kvazzup: Open Software for HEVC Video Calls.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Symposium on Multimedia, 2017

High-level synthesized 2-D IDCT/IDST implementation for HEVC codecs on FPGA.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Complexity based test cases for log file analyzers.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Industrial Informatics, 2017

High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

Analysis and Visualization of Product Memory Layout in IP-XACT.

[BibT_eX]

[DOI]

Proceedings of the Euromicro Conference on Digital System Design, 2017

2016

PROMOTE: A Process Mining Tool for Embedded System Development.

[BibT_eX]

[DOI]

Arttu Leppäkoski

Proceedings of the Product-Focused Software Process Improvement, 2016

Log File Analyzing in Intelligent Transportation Systems Development.

[BibT_eX]

[DOI]

Vinod Kumar Malamal Vadakital

Proceedings of the Product-Focused Software Process Improvement, 2016

Distributed systemc simulation on manycore servers.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Kvazaar: Open-Source HEVC/H.265 Encoder.

[BibT_eX]

[DOI]

Proceedings of the 2016 ACM Conference on Multimedia Conference, 2016

RTP/RTCP Reception Hint Tracks for Video Call Recording and Playback.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Multimedia, 2016

Live demonstration: Run-time visualization of Kvazaar HEVC intra encoder.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Designing a clock cycle accurate application with high-level synthesis.

[BibT_eX]

[DOI]

Sakari Lahti

Proceedings of the IECON 2016, 2016

Behavior Mining Language for mining expected behavior from log files.

[BibT_eX]

[DOI]

Proceedings of the IECON 2016, 2016

AVX2-optimized Kvazaar HEVC intra encoder.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

The structure of robust controllers for distributed parameter systems.

[BibT_eX]

[DOI]

Proceedings of the 15th European Control Conference, 2016

2015

Kvazaar HEVC still image coding on Raspberry Pi 2 for low-cost remote surveillance.

[BibT_eX]

[DOI]

Proceedings of the 2015 Visual Communications and Image Processing, 2015

Semantics analyzing expression editors in IP-XACT design tool Kactus2.

[BibT_eX]

[DOI]

Proceedings of the 14th Symposium on Programming Languages and Software Tools (SPLST'15), 2015

LOGDIG log file analyzer for mining expected behavior from log files.

[BibT_eX]

[DOI]

Proceedings of the 14th Symposium on Programming Languages and Software Tools (SPLST'15), 2015

Parallelization of Kvazaar HEVC intra encoder for multi-core processors.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

Kvazaar HEVC encoder for efficient intra coding.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Resolving parameter reference management in IP-XACT using Kactus2.

[BibT_eX]

[DOI]

Proceedings of the IECON 2015, 2015

Performance evaluation of Kvazaar HEVC intra encoder on Xeon Phi many-core processor.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE Global Conference on Signal and Information Processing, 2015

High-Level Synthesis Design Flow for HEVC Intra Encoder on SoC-FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014

Efficient Mode Decision Schemes for HEVC Inter Prediction.

[BibT_eX]

[DOI]

Marko Viitanen

IEEE Trans. Circuits Syst. Video Technol., 2014

Comparative study of 8 and 10-bit HEVC encoders.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014

Implementation of Multicore communications API.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on System-on-Chip, 2014

WOKE: A novel workflow model editor.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on System-on-Chip, 2014

Gamification of System-on-Chip design.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on System-on-Chip, 2014

Experiences from System-on-Chip design courses.

[BibT_eX]

[DOI]

Lauri Matilainen

Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014

2013

Low-Power Wireless Sensor Network Platforms.

[BibT_eX]

[DOI]

Proceedings of the Handbook of Signal Processing Systems, 2013

A scalable, non-interfering, synthesizable Network-on-Chip monitor - Extended version.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2013

Recommendations for using Simulated Annealing in task mapping.

[BibT_eX]

[DOI]

Heikki Orsila

Des. Autom. Embed. Syst., 2013

Dependency analysis and visualization tool for Kactus2 IP-XACT design framework.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Symposium on System on Chip, 2013

Framework for industrial embedded system product development and management.

[BibT_eX]

[DOI]

Arttu Leppakoski

Proceedings of the 2013 International Symposium on System on Chip, 2013

Extending IP-XACT to embedded system HW/SW integration.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Symposium on System on Chip, 2013

Teaching system-on-chip design with FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 10th FPGAworld Conference, 2013

On the structure of robust controllers for infinite-dimensional systems.

[BibT_eX]

[DOI]

Proceedings of the 12th European Control Conference, 2013

2012

Low-Power Wireless Sensor Networks - Protocols, Services and Applications

[BibT_eX]

[DOI]

Springer Briefs in Electrical and Computer Engineering, Springer, ISBN: 978-1-4614-2173-3, 2012

Comparative Rate-Distortion-Complexity Analysis of HEVC and AVC Video Codecs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2012

MARTE profile extension for modeling dynamic power management of embedded systems.

[BibT_eX]

[DOI]

J. Syst. Archit., 2012

System-on-Chip deployment with MCAPI abstraction and IP-XACT metadata.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Integration of TTA processor tools to Kactus2 IP-XACT design flow.

[BibT_eX]

[DOI]

Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

Complexity analysis of next-generation HEVC decoder.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Generic software framework for a line-buffer-based image processing pipeline.

[BibT_eX]

[DOI]

IEEE Trans. Consumer Electron., 2011

A Self-Tuning Robust Regulator for Infinite-Dimensional Systems.

[BibT_eX]

[DOI]

IEEE Trans. Autom. Control., 2011

Design and Implementation of a Firmware Update Protocol for Resource Constrained Wireless Sensor Networks.

[BibT_eX]

[DOI]

Int. J. Embed. Real Time Commun. Syst., 2011

A Wireless Sensor Network for Hospital Security: From User Requirements to Pilot Deployment.

[BibT_eX]

[DOI]

EURASIP J. Wirel. Commun. Netw., 2011

Meta-Model and UML Profile for Requirements Management of Software and Embedded Systems.

[BibT_eX]

[DOI]

Tero Arpinen

EURASIP J. Embed. Syst., 2011

Remote diagnostics and performance analysis for a wireless sensor network.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Applying IP-XACT in product data management.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Symposium on System on Chip, 2011

A set of traffic models for Network-on-Chip benchmarking.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Symposium on System on Chip, 2011

Link Quality-Based Channel Selection for Resource Constrained WSNs.

[BibT_eX]

[DOI]

Proceedings of the Advances in Grid and Pervasive Computing - 6th International Conference, 2011

Kactus2: Environment for Embedded Product Development Using IP-XACT and MCAPI.

[BibT_eX]

[DOI]

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Pilot studies of wireless sensor networks: Practical experiences.

[BibT_eX]

[DOI]

Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Range-free algorithm for energy-efficient indoor localization in Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Practical monitoring and analysis tool for WSN testing.

[BibT_eX]

[DOI]

Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010

Robust Regulation of Distributed Parameter Systems with Infinite-Dimensional Exosystems.

[BibT_eX]

[DOI]

SIAM J. Control. Optim., 2010

Class of Service Support Layer for Wireless Mesh Networks.

[BibT_eX]

[DOI]

Jukka Suhonen

Int. J. Commun. Netw. Syst. Sci., 2010

Energy-Efficient Reservation-Based Medium Access Control Protocol for Wireless Sensor Networks.

[BibT_eX]

[DOI]

EURASIP J. Wirel. Commun. Netw., 2010

Positioning in resource-constrained ultra low-power Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the Ubiquitous Positioning Indoor Navigation and Location Based Service, 2010

Program image dissemination protocol for low-energy multihop wireless sensor networks.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

Low-power Wireless Sensor Network Platforms.

[BibT_eX]

[DOI]

Proceedings of the Handbook of Signal Processing Systems, 2010

2009

Evaluating SoC Network Performance in MPEG-4 Encoder.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2009

A Configurable Motion Estimation Architecture for Block-Matching Algorithms.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2009

Availability and End-to-end Reliability in Low Duty Cycle MultihopWireless Sensor Networks.

[BibT_eX]

[DOI]

Jukka Suhonen

Sensors, 2009

Application modelling and hardware description for network-on-chip benchmarking.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2009

Performance Evaluation of UML2-Modeled Embedded Streaming Applications with System-Level Simulation.

[BibT_eX]

[DOI]

EURASIP J. Embed. Syst., 2009

Energy-efficient neighbor discovery protocol for mobile wireless sensor networks.

[BibT_eX]

[DOI]

Ad Hoc Networks, 2009

HybridKernel: Preemptive kernel with event-driven extension for resource constrained wireless sensor networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Robust tree construction and maintenance for global time synchronization protocols in Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Parameterizing simulated annealing for distributing Kahn Process Networks on multiprocessor SoCs.

[BibT_eX]

[DOI]

Heikki Orsila

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Configurable Data Memory for Multimedia Processing.

[BibT_eX]

[DOI]

Eero Aho

J. Signal Process. Syst., 2008

A Parallel Memory System for Variable Block-Size Motion Estimation Algorithms.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2008

Evaluating the model accuracy in automated design space exploration.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2008

Editorial.

[BibT_eX]

[DOI]

Mladen Berekovic

Andy D. Pimentel

J. Syst. Archit., 2008

Performance model for IEEE 802.11s wireless mesh network deployment design.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2008

Distributed bus arbitration algorithm comparison on FPGA-based MPEG-4 multiprocessor system on chip.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2008

Network Signaling Channel for Improving ZigBee Performance in Dynamic Cluster-Tree Networks.

[BibT_eX]

[DOI]

EURASIP J. Wirel. Commun. Netw., 2008

A Wireless Sensor Network for RF-Based Indoor Localization.

[BibT_eX]

[DOI]

EURASIP J. Adv. Signal Process., 2008

Rapid design and evaluation framework for wireless sensor networks.

[BibT_eX]

[DOI]

Mauri Kuorilehto

Ad Hoc Networks, 2008

Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2008

Application Server for Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2008

On the credibility of load-latency measurement of network-on-chips.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008

Evaluation of heterogeneous multiprocessor architectures by energy and performance optimization.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008

Real-time execution monitoring on multi-processor system-on-chip.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008

2007

Configurable implementation of parallel memory based real-time video downscaler.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2007

Editorial.

[BibT_eX]

[DOI]

J. Syst. Archit., 2007

Benchmarking mesh and hierarchical bus networks in system-on-chip context.

[BibT_eX]

[DOI]

J. Syst. Archit., 2007

Automated memory-aware application distribution for Multi-processor System-on-Chips.

[BibT_eX]

[DOI]

J. Syst. Archit., 2007

Editorial.

[BibT_eX]

[DOI]

J. Syst. Archit., 2007

Implementing a WLAN Video Terminal Using UML and Fully Automated Design Flow.

[BibT_eX]

[DOI]

EURASIP J. Embed. Syst., 2007

Evaluation of throughput estimation models and algorithms for WLAN frequency planning.

[BibT_eX]

[DOI]

Comput. Networks, 2007

Compact modular exponentiation accelerator for modern FPGA devices.

[BibT_eX]

[DOI]

Comput. Electr. Eng., 2007

Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2007

SensorOS: A New Operating System for Time Critical WSN Applications.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2007

Evaluating Large System-on-Chip on Multi-FPGA Platform.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2007

Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks.

[BibT_eX]

[DOI]

Panu Hämäläinen

Proceedings of the Embedded Computer Systems: Architectures, 2007

Genetic Algorithm to Optimize Node Placement and Configuration for WLAN Planning.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Symposium on Wireless Communication Systems, 2007

Optimal Subset Mapping And Convergence Evaluation of Mapping Algorithms for Distributing Task Graphs on Multiprocessor SoC.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on System-on-Chip, 2007

Modeling Embedded Software Platforms with a UML Profile.

[BibT_eX]

[DOI]

Proceedings of the Forum on specification and Design Languages, 2007

On network-on-chip comparison.

[BibT_eX]

[DOI]

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Evaluating the Model Accuracy in Automated Design Space Exploration.

[BibT_eX]

[DOI]

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

IP Integration Overhead Analysis in System-on-Chip Video Encoder.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

Instruction Memory Architecture Evaluation on Multiprocessor FPGA MPEG-4 Encoder.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

Cost-aware capacity optimization in dynamic multi-hop WSNs.

[BibT_eX]

[DOI]

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Compact hardware design of Whirlpool hashing core.

[BibT_eX]

[DOI]

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

HIBI Communication Network for System-on-Chip.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 2006

Scalable Architecture for SoC Video Encoders.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 2006

UML-based multiprocessor SoC design framework.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2006

A High-Performance Sum of Absolute Difference Implementation for Motion Estimation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2006

Asymptotically H<sup>2</sup> -Optimal Tuning of Low Gain Robust Controllers for DPS.

[BibT_eX]

[DOI]

IEEE Trans. Autom. Control., 2006

Scalable MPEG-4 Encoder on FPGA Multiprocessor SOC.

[BibT_eX]

[DOI]

EURASIP J. Embed. Syst., 2006

Design and implementation of real-time betting system with offline terminals.

[BibT_eX]

[DOI]

Electron. Commer. Res. Appl., 2006

Design, Implementation, and Experiments on Outdoor Deployment of Wireless Sensor Network for Environmental Monitoring.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2006

Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2006

Security in Wireless Sensor Networks: Considerations and Experiments.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2006

Parallel Memory Implementation for Arbitrary Stride Accesses.

[BibT_eX]

[DOI]

Eero Aho

Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006

Cost-Aware Dynamic Routing Protocol for Wireless Sensor Networks - Design and Prototype Experiments.

[BibT_eX]

[DOI]

Proceedings of the IEEE 17th International Symposium on Personal, 2006

Experimenting TCP/IP for Low-Power Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE 17th International Symposium on Personal, 2006

Configurable Protocol Engine for Runtime-Configurable Communication Subsystems on Multiprocessor SoC.

[BibT_eX]

[DOI]

Proceedings of the IEEE 17th International Symposium on Personal, 2006

Transmission Power Based Path Loss Metering for Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE 17th International Symposium on Personal, 2006

WSN API: Application Programming Interface for Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE 17th International Symposium on Personal, 2006

Performance analysis of IEEE 802.15.4 and ZigBee for large-scale wireless sensor network applications.

[BibT_eX]

[DOI]

Proceedings of the 3rd ACM International Workshop on Performance Evaluation of Wireless Ad Hoc, 2006

High-performance multi-radio WSN platform.

[BibT_eX]

[DOI]

Proceedings of the 2nd International Workshop on Multi-Hop Ad Hoc Networks: From Theory to Reality, 2006

The Impact of Communication on the Scalability of the Data-parallel Video Encoder on MPSoC.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on System-on-Chip, 2006

Parameterizing Simulated Annealing for Distributing Task Graphs on Multiprocessor SoCs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on System-on-Chip, 2006

Reliable GALS Implementation of MPEG-4 Encoder with Mixed Clock FIFO on Standard FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Comparison of GALS and Synchronous Architectures with MPEG-4 Video Encoder on Multiprocessor System-on-Chip FPGA.

[BibT_eX]

[DOI]

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core.

[BibT_eX]

[DOI]

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Impact of Shared Instruction Memory on Performance of FPGA-based MP-SoC Video Encoder.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Parallel Memory Architecture for Arbitrary Stride Accesses.

[BibT_eX]

[DOI]

Eero Aho

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

Comments on "Winscale: an image-scaling algorithm using an area pixel Model".

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2005

Block-level parallel processing for scaling evenly divisible images.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

On the realization of periodic functions.

[BibT_eX]

[DOI]

Eero Immonen

Syst. Control. Lett., 2005

Experimental parallel implementation of a wavelet-based still image encoder.

[BibT_eX]

[DOI]

Kaisa Haapala

Microprocess. Microsystems, 2005

A Survey of Application Distribution in Wireless Sensor Networks.

[BibT_eX]

[DOI]

Mauri Kuorilehto

EURASIP J. Wirel. Commun. Netw., 2005

High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2005

Design and Implementation of a WLAN Terminal Using UML 2.0 Based Design Flow.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2005

Multihop IEEE 802.11b WLAN Performance for VoIP.

[BibT_eX]

[DOI]

Proceedings of the IEEE 16th International Symposium on Personal, 2005

A middleware for task allocation in wireless sensor networks.

[BibT_eX]

[DOI]

Mauri Kuorilehto

Proceedings of the IEEE 16th International Symposium on Personal, 2005

Energy optimized beacon transmission rate in a wireless sensor network.

[BibT_eX]

[DOI]

Mikko Kohvakka

Proceedings of the IEEE 16th International Symposium on Personal, 2005

Ultra low energy wireless temperature sensor network implementation.

[BibT_eX]

[DOI]

Mikko Kohvakka

Proceedings of the IEEE 16th International Symposium on Personal, 2005

Frequency management tool for multi-cell WLAN performance optimization.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE Workshop on Local and Metropolitan Area Networks, 2005

Software and hardware prototypes of the IEEE 1588 precision time protocol on wireless LAN.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE Workshop on Local and Metropolitan Area Networks, 2005

Interfacing UML 2.0 for Multiprocessor System-on-Chip Design Flow.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Symposium on System-on-Chip, 2005

Hybrid Algorithm for Mapping Static Task Graphs on Multiprocessor SoCs.

[BibT_eX]

[DOI]

Heikki Orsila

Proceedings of the 2005 International Symposium on System-on-Chip, 2005

Performance Modeling and Reporting for the UML 2.0 Design of Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Symposium on System-on-Chip, 2005

Acceleration of Modular Exponentiation on System-on-a-Programmable-Chip.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Symposium on System-on-Chip, 2005

HIBI-based multiprocessor SoC on FPGA.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Algorithmic optimization of H.264/AVC encoder.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Block-level parallel processing for scaling evenly divisible frames.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Co-simulation of Wireless Local Area Network Terminals with Protocol Software Implemented in SDL.

[BibT_eX]

[DOI]

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Wireless Sensor Network Implementation for Industrial Linear Position Metering.

[BibT_eX]

[DOI]

Mikko Kohvakka

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Design of Transport Triggered Architecture Processors for Wireless Encryption.

[BibT_eX]

[DOI]

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

UML 2.0 Profile for Embedded System Design.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

2004

Address Computation in Configurable Parallel Memory Architecture.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2004

Comparison of Data Dependence Analysis Tests.

[BibT_eX]

[DOI]

Miia Viitanen

Proceedings of the Computer Systems: Architectures, 2004

HIBI v.2 Communication Network for System-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the Computer Systems: Architectures, 2004

A Communication-Centric Design Flow for HIBI-Based SoCs.

[BibT_eX]

[DOI]

Proceedings of the Computer Systems: Architectures, 2004

UML 2.0 implementation of an embedded WLAN protocol.

[BibT_eX]

[DOI]

Proceedings of the IEEE 15th International Symposium on Personal, 2004

Comparison of hardware IP components for system-on-chip.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on System-on-Chip, 2004

Practical distributed simulation of a network of wireless terminals.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on System-on-Chip, 2004

Design of a Manageable WLAN Access Point.

[BibT_eX]

[DOI]

Proceedings of the Telecommunications and Networking, 2004

Precision Time Protocol Prototype on Wireless LAN.

[BibT_eX]

[DOI]

Proceedings of the Telecommunications and Networking, 2004

Accelerating the secure remote password protocol using reconfigurable hardware.

[BibT_eX]

[DOI]

Proceedings of the First Conference on Computing Frontiers, 2004

2003

Performance of H.26L Video Encoder on General-Purpose Processor.

[BibT_eX]

[DOI]

Antti Hallapuro

J. VLSI Signal Process., 2003

TUTWLAN - QoS Supporting Wireless Network.

[BibT_eX]

[DOI]

Telecommun. Syst., 2003

Complexity of optimized H.26L video decoder implementation.

[BibT_eX]

[DOI]

Antti Hallapuro

IEEE Trans. Circuits Syst. Video Technol., 2003

Comparison of video protection methods for wireless networks.

[BibT_eX]

[DOI]

Signal Process. Image Commun., 2003

Class of service control protocol for wireless LAN.

[BibT_eX]

[DOI]

Jukka Suhonen

Proceedings of the IEEE 14th International Symposium on Personal, 2003

Positioning with IEEE 802.11b wireless LAN.

[BibT_eX]

[DOI]

Proceedings of the IEEE 14th International Symposium on Personal, 2003

Implementation of a Video Transcoder for Embedded System.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Information Technology (ITCC 2003), 2003

Experiments on Local Positioning with Bluetooth.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Information Technology (ITCC 2003), 2003

Complexity analysis of spatially scalable MPEG-4 encoder.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on System-on-Chip, 2003

Using a communication generator in SoC architecture exploration.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on System-on-Chip, 2003

Comparison of synthesized bus and crossbar interconnection architectures.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Offline architecture for real-time betting.

[BibT_eX]

[DOI]

Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003

Design of a Management System for Wireless Home Area Networking.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2003. Parallel Processing, 2003

Distributing SoC Simulations over a Network of Computers.

[BibT_eX]

[DOI]

Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2002

Overview of research efforts on media ISA extensions and their usage in video coding.

[BibT_eX]

[DOI]

Petri Liuha

IEEE Trans. Circuits Syst. Video Technol., 2002

On the asymptotically optimal tuning of robust controllers for systems in the CD-algebra.

[BibT_eX]

[DOI]

IEEE Trans. Autom. Control., 2002

Parallel implementation of video encoder on quad DSP system.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2002

Interconnection scheme for continuous-media systems-on-a-chip.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2002

Configurable parallel memory architecture for multimedia computers.

[BibT_eX]

[DOI]

J. Syst. Archit., 2002

Trends in personal wireless data communications.

[BibT_eX]

[DOI]

Comput. Commun., 2002

Video Transfer Control Protocol for a Wireless Video Demonstrator.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Information Technology (ITCC 2002), 2002

Unified Method for Optimization of Several Video Coding Algorithms on General-Purpose Processors.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Information Technology (ITCC 2002), 2002

Parameter optimization tool for enhancing on-chip network performance.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Using SDL a tool for system simulations.

[BibT_eX]

[DOI]

Antti Laitinen

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Optimizing finite state machines for system-on-chip communication.

[BibT_eX]

[DOI]

Vesa Lahtinen

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

TDMA-based communication scheduling in system-on-chip video encoder.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Performance evaluation of Secure Remote Password protocol.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Enhanced Configurable Parallel Memory Architecture.

[BibT_eX]

[DOI]

Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

Detecting corrupted intra macroblocks in H.263 video.

[BibT_eX]

[DOI]

Proceedings of the IEEE 5th Workshop on Multimedia Signal Processing, 2002

2001

Architecture of a passenger information system for public transport services.

[BibT_eX]

[DOI]

Proceedings of the 54th IEEE Vehicular Technology Conference, 2001

Interfacing multiple processors in a system-on-chip video encoder.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Parallel implementation of H.263 encoder for CIF-sized images on quad DSP system.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Implementation of encryption algorithms on transport triggered architectures.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Configurable hardware implementation of triple-DES encryption algorithm for wireless local area network.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2001

Performance analysis of low bit rate H.26L video encoder.

[BibT_eX]

[DOI]

Antti Hallapuro

Proceedings of the IEEE International Conference on Acoustics, 2001

2000

A finite-dimensional robust controller for systems in the CD-algebra.

[BibT_eX]

[DOI]

IEEE Trans. Autom. Control., 2000

Parallel Implementation of Self-Organizing Map on the Partial Tree Shape Neurocomputer.

[BibT_eX]

[DOI]

Neural Process. Lett., 2000

PARNEU: general-purpose partial tree computer.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2000

Chained backplane communication architecture for scalable multiprocessor systems.

[BibT_eX]

[DOI]

J. Syst. Archit., 2000

Using SDL for Implementing a Wireless Medium Access Control Protocol.

[BibT_eX]

[DOI]

Proceedings of the 2000 International Symposium on Multimedia Software Engineering, 2000

Real-time H.263 encoding of QCIF-images on TMS320C6201 fixed point DSP.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Scalable implementation of H.263 video encoder on a parallel DSP system.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Parallel DSP implementation of wavelet transform in image compression.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Scalable DSP implementation of DCT-based motion estimation algorithm.

[BibT_eX]

[DOI]

Proceedings of the 10th European Signal Processing Conference, 2000

Advanced prototype platform for a wireless multimedia local area network.

[BibT_eX]

[DOI]

Proceedings of the 10th European Signal Processing Conference, 2000

Real-time implementation of H.263 video encoder on TMS320C6201 fixed point DSP.

[BibT_eX]

[DOI]

Proceedings of the 10th European Signal Processing Conference, 2000

Reuseable interface in multimedia hardware environment.

[BibT_eX]

[DOI]

Proceedings of the 10th European Signal Processing Conference, 2000

Bridging network traffic between wireless and wired lans in Windows NT.

[BibT_eX]

[DOI]

Proceedings of the 10th European Signal Processing Conference, 2000

H.263 video encoder implementation on a scalable DSP system.

[BibT_eX]

[DOI]

Proceedings of the 10th European Signal Processing Conference, 2000

Hardware implementation of the improved WEP and RC4 encryption algorithms for wireless terminals.

[BibT_eX]

[DOI]

Proceedings of the 10th European Signal Processing Conference, 2000

Scalable DSP realization of wavelet transform in image coding.

[BibT_eX]

[DOI]

Proceedings of the 10th European Signal Processing Conference, 2000

Embedding SDL implemented protocols into DSP.

[BibT_eX]

[DOI]

Proceedings of the 2000 International Conference on Compilers, 2000

Scalable Realization of Sparse Distributed Memory on a Multiprocessor System.

[BibT_eX]

Proceedings of the ISCA 9th International Conference on Intelligent Systems, 2000

1999

Field programmable gate array-based PCI interface for a coprocessor system.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 1999

Practical VHDL optimization for timing critical FPGA applications.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 1999

Windows NT Software Design and Implementation for a Wireless LAN Base Station.

[BibT_eX]

[DOI]

Proceedings of Second ACM International Workshop on Wireless Mobile Multimedia, 1999

Unified Messaging: A Framwork Approach for Building Messaging Services.

[BibT_eX]

[DOI]

Esa Saukkonen

Proceedings of the Intelligence in Networks, 1999

Software support for low latency communication in scalable multimedia DSP system.

[BibT_eX]

[DOI]

Proceedings of the Third IEEE Workshop on Multimedia Signal Processing, 1999

Architecture for a Windows NT wireless LAN multimedia terminal.

[BibT_eX]

[DOI]

Proceedings of the Third IEEE Workshop on Multimedia Signal Processing, 1999

Reconfiguration Mechanism for an IP Block Based Interconnection.

[BibT_eX]

[DOI]

Proceedings of the 25th EUROMICRO '99 Conference, 1999

On the asymptotically optimal tuning of robust controllers for systems in the CD-algebra: The case of sinusoidal reference signals.

[BibT_eX]

[DOI]

Proceedings of the 5th European Control Conference, 1999

1998

Security design for a new wireless local area network TUTWLAN.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE International Symposium on Personal, 1998

TUTMAC: a medium access control protocol for a new multimedia wireless local area network.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE International Symposium on Personal, 1998

1997

Mapping of SOM and LVQ Algorithms on a Tree Shape Parallel Computer System.

[BibT_eX]

[DOI]

Parallel Comput., 1997

Parallel realizations of Kanerva's sparse distributed memory on a tree-shaped computer.

[BibT_eX]

[DOI]

Concurr. Pract. Exp., 1997

Mappings of SOM and LVQ on the partial tree shape neurocomputer.

[BibT_eX]

[DOI]

Kimmo Kaski

Proceedings of International Conference on Neural Networks (ICNN'97), 1997

Mapping of Radial Basis Function Networks to Partial Tree Shape Parallel Neurocomputer.

[BibT_eX]

[DOI]

Proceedings of the Artificial Neural Networks, 1997

1996

Mapping artificial neural networks to a tree shape neurocomputer.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 1996

Accelerating genetic algorithm computation in tree shaped parallel computer.

[BibT_eX]

[DOI]

J. Syst. Archit., 1996

Mapping of multilayer perceptron networks to tree shape parallel neurocomputer.

[BibT_eX]

[DOI]

Proceedings of International Conference on Neural Networks (ICNN'96), 1996

Mapping of Multilayer Perceptron Networks to Partial Tree Shaped Parallel Neurocomputer.

[BibT_eX]

[DOI]

Proceedings of the Artificial Neural Networks, 1996

Linearly Expandable Partial Tree Shape Architecture for Parallel Neurocomputer.

[BibT_eX]

[DOI]

Kimmo Kaski

Proceedings of the Artificial Neural Networks, 1996

1995

TUTNC: a general purpose parallel computer for neural network computations.

[BibT_eX]

[DOI]