Timir Nandi

According to our database, Timir Nandi authored at least 4 papers between 2012 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

Dynamic amplifiers for analog-to-digital converters

Timir Nandi

PhD thesis, 2020

2016

23.1 A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b source synchronous transceiver using DVFS and rapid on/off in 65nm CMOS.

Guanghua Shu, Woo-Seok Choi, Saurabh Saxena, Seong Joong Kim, Mrunmay Talegaonkar, Romesh Kumar Nandwana, Ahmed Elkholy, Da Wei, Timir Nandi, Pavan Kumar Hanumolu

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2013

Continuous-Time ΔΣ Modulators With Improved Linearity and Reduced Clock Jitter Sensitivity Using the Switched-Capacitor Return-to-Zero DAC.

Timir Nandi, Karthikeya Boominathan, Shanthi Pavan

IEEE J. Solid State Circuits, 2013

2012

A continuous-time ΔΣ modulator with 87 dB dynamic range in a 2MHz signal bandwidth using a Switched-Capacitor Return-to-Zero DAC.

Timir Nandi, Karthikeya Boominathan, Shanthi Pavan

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012