Tim T. Hoang

According to our database, Tim T. Hoang authored at least 8 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.

Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Rani Kale, Mark Flanigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang

IEEE J. Solid State Circuits, April, 2024

Automated Tuning of Ring-Assisted MZI-Based Interleaver for DWDM Systems.

Songli Wang, Yuyang Wang, Xiang Meng, Kaveh Hosseini, Tim Tri Hoang, Keren Bergman

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2024

Silicon Photonics Chip I/O for Ultra High-Bandwidth and Energy-Efficient Die-to-Die Connectivity.

Yuyang Wang, Songli Wang, Robert Parsons, Asher Novick, Vignesh Gopal, Kaylx Jang, Anthony Rizzo, Chia-Pin Chiu, Kaveh Hosseini, Tim Tri Hoang, Sergey Y. Shumarayev, Keren Bergman

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023

Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm² AIB 2.0 Interface to Provide Versatile Workload Acceleration.

Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Kale, Mark Flannigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Simultaneous Error-Free Data Modulation with Silicon Microdisks in the Multi-FSR Regime for Scalable DWDM Links.

Vignesh Gopal, Anthony Rizzo, Maarten Hattink, Asher Novick, James Robinson, Kaveh Hosseini, Tim Tri Hoang, Keren Bergman

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023

2022

5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O.

Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Daniel Jeong, Allen Chan, Austin Katzin, Songtao Liu, Radek Roucka, Manan Raval, Minh Mac, Chia-Pin Chiu, Thungoc Tran, Kumar Abhishek Singh, Sangeeta Raman, Yanjing Ke, Chen Li, Li-Fan Yang, Paulo Chao, Haiwei Lu, Fernando Luna, Xiaoqian Li, Tim Tri Hoang, Arnab Sarkar, Asako Toda, Ravi Mahajan, Nitin Deshpande, Conor O'Keeffe, Uma Krishnamoorthy, Vladimir Stojanovic, Christopher Madden, Chong Zhang, Matt Sysak, Pavan Bhargava, Chen Sun, Mark Wade

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO.

Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Chia-Pin Chiu, Arnab Sarkar, Asako Toda, Yanjing Ke, Allen Chan, Daniel Jeong, Mason Zhang, Sangeeta Raman, Thungoc Tran, Kumar Abhishek Singh, Pavan Bhargava, Chong Zhang, Haiwei Lu, Ravi Mahajan, Xiaoqian Li, Nitin Deshpande, Conor O'Keeffe, Tim Tri Hoang, Uma Krishnamoorthy, Chen Sun, Roy Meade, Vladimir Stojanovic, Mark Wade

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2021

2020

TeraPHY: A Chiplet Technology for Low-Power, High-Bandwidth In-Package Optical I/O.

Mark T. Wade, Roy Meade, Chandru Ramamurthy, Michael Rust, Forrest Sedgwick, Vladimir Stojanovic, Derek Van Orden, Chong Zhang, Chen Sun, Sergey Y. Shumarayev, Conor O'Keeffe, Erik Anderson, Tim T. Hoang, David Kehlet, Ravi V. Mahajan, Matthew T. Guzy, Allen Chan, Tina Tran, Shahab Ardalan, Pavan Bhargava, Sidney Buchbinder, Michael L. Davenport, John Michael Fini, Haiwei Lu, Chen Li

IEEE Micro, 2020