Tim Piessens

Orcid: 0000-0003-1954-9709

According to our database1, Tim Piessens authored at least 11 papers between 2002 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Introduction to the Special Issue on the 2017 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2017

Session 5 overview: Analog techniques.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
16.5 A flexible thin-film pixel array with a charge-to-current gain of 59µA/pC and 0.33% nonlinearity and a cost effective readout circuit for large-area X-ray imaging.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Session 5 overview: Analog techniques.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2012
A 1.5W 10V-output Class-D amplifier using a boosted supply from a single 3.3V input in standard 1.8V/3.3V 0.18μm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
Nanosecond Delay Floating High Voltage Level Shifters in a 0.35 μ m HV-CMOS Technology.
IEEE J. Solid State Circuits, 2011

2005
Behavioral analysis of self-oscillating class D line drivers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A high-voltage output driver in a 2.5-V 0.25-μm CMOS technology.
IEEE J. Solid State Circuits, 2005

2003
Highly efficient xDSL line drivers in 0.35-μm CMOS using a self-oscillating power amplifier.
IEEE J. Solid State Circuits, 2003

Oscillator pulling and synchronisation issues in self-oscillating class D power amplifiers.
Proceedings of the ESSCIRC 2003, 2003

2002
A central office combined ADSL-VDSL line driver solution in .35μm CMOS.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002


  Loading...