Tianyou Bao

Orcid: 0000-0003-3321-5123

According to our database1, Tianyou Bao authored at least 16 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
FELIX: FPGA-Based Scalable and Lightweight Accelerator for Large Integer Extended GCD.
IEEE Trans. Very Large Scale Integr. Syst., September, 2024

AEKA: FPGA Implementation of Area-Efficient Karatsuba Accelerator for Ring-Binary-LWE-Based Lightweight PQC.
ACM Trans. Reconfigurable Technol. Syst., June, 2024

TINA: TMVP-Initiated Novel Accelerator for Lightweight Ring-LWE-Based PQC.
IEEE Trans. Very Large Scale Integr. Syst., May, 2024

CASA: A Compact and Scalable Accelerator for Approximate Homomorphic Encryption.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

FELIX (XGCD for FALCON): FPGA-based Scalable and Lightweight Accelerator for Large Integer Extended GCD.
IACR Cryptol. ePrint Arch., 2024

HELP: Highly Efficient and Low-Latency Hardware Accelerator for Integer Polynomial Multiplication.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

2023
FPGA Implementation of Compact Hardware Accelerators for Ring-Binary-LWE-based Post-quantum Cryptography.
ACM Trans. Reconfigurable Technol. Syst., September, 2023

COPMA: Compact and Optimized Polynomial Multiplier Accelerator for High-Performance Implementation of LWR-Based PQC.
IEEE Trans. Very Large Scale Integr. Syst., April, 2023

Efficient Hardware RNS Decomposition for Post-Quantum Signature Scheme FALCON.
IACR Cryptol. ePrint Arch., 2023

Efficient Implementation of Ring-Binary-LWE-based Lightweight PQC Accelerator on the FPGA Platform.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022
Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

HPMA-Saber: High-Performance Polynomial Multiplication Accelerator for KEM Saber.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum Cryptography.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

Ultra Low-Complexity Implementation of Binary Ring-LWE based Post-Quantum Cryptography on FPGA Platform.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

Work-in-Progress: High-Performance Systolic Hardware Accelerator for RBLWE-based Post-Quantum Cryptography.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022

2018
A New Optimized Queueing Model with Compensation and Buffer.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2018


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