Tianming Ni

According to our database, Tianming Ni authored at least 89 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

MURLAV: A Multiple-Node-Upset Recovery Latch and Algorithm-Based Verification Method.

Aibin Yan, Zhixing Li, Zhongyu Gao, Jing Zhang, Zhengfeng Huang, Tianming Ni, Jie Cui, Xiaolei Wang, Patrick Girard, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2024

FeMPIM: A FeFET-Based Multifunctional Processing-in-Memory Cell.

Aibin Yan, Yu Chen, Zhongyu Gao, Tianming Ni, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen

IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

Designs of High-Speed Triple-Node-Upset Hardened Latch Based on Dual-Modular-Redundancy.

Zhengfeng Huang, Yan Zhang, Lei Ai, Huaguo Liang, Tianming Ni, Tai Song, Aibin Yan

J. Circuits Syst. Comput., March, 2024

Reliability analysis and comparison of ring-PUF based on probabilistic models.

Jingchang Bian, Zhengfeng Huang, Yankun Lin, Zhao Yang, Huaguo Liang, Tianming Ni

Microelectron. J., February, 2024

A Quadruple-Node Upsets Hardened Latch Design Based on Cross-Coupled Elements.

Zhengfeng Huang, Zishuai Li, Liting Sun, Huaguo Liang, Tianming Ni, Aibin Yan

J. Electron. Test., February, 2024

Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS.

Aibin Yan, Litao Wang, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Very Large Scale Integr. Syst., January, 2024

Introduction to the Special Issue on Design for Testability and Reliability of Security-aware Hardware.

Tianming Ni, Xiaoqing Wen, Hussam Amrouch, Cheng Zhuo, Peilin Song

ACM Trans. Design Autom. Electr. Syst., January, 2024

Design Guidelines and Feedback Structure of Ring Oscillator PUF for Performance Improvement.

Zhengfeng Huang, Jingchang Bian, Yankun Lin, Huaguo Liang, Tianming Ni

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

A cost-effective and highly robust triple-node-upset self-recoverable latch design based on dual-output C-elements.

Hui Xu, Lin Tang, Ruijun Ma, Huaguo Liang, Zhengfeng Huang, Tianming Ni, Jiuqi Li, Xiaodong Ai

Microelectron. J., 2024

A demultiplexer-based dual-path switching true random number generator.

Tianming Ni, Kejie Xu, Hao Wu, Senling Wang, Mu Nie

Microelectron. J., 2024

A lightweight reversible multi-mode physical unclonable function.

Zhengfeng Huang, Peng Ye, Ruixiang Liu, Jingchang Bian, Zhao Yang, Yingchun Lu, Yiming Ouyang, Huaguo Liang, Tianming Ni

Microelectron. J., 2024

Design of radiation hardened latch with low delay and tolerance of quadruple-node-upset in 32 nm process.

Zhengfeng Huang, Xin Chen, Xinyu Jiang, Lei Ai, Huaguo Liang, Yiming Ouyang, Tianming Ni

Microelectron. J., 2024

Test Point Selection for Multi-Cycle Logic BIST using Multivariate Temporal-Spatial GCNs.

Senling Wang, Shaoqi Wei, Hisashi Okamoto, Tatusya Nishikawa, Hiroshi Kai, Yoshinobu Higami, Hiroyuki Yotsuyanagi, Ruijun Ma, Tianming Ni, Hiroshi Takahashi, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2024

PFO PUF: A Lightweight Parallel Feed Obfuscation PUF Resistant to Machine Learning Attacks.

Zhengfeng Huang, Yankun Lin, Fansheng Zeng, Jingchang Bian, Zhao Yang, Huaguo Liang, Yingchun Lu, Liang Yao, Xiaoqing Wen, Tianming Ni

Proceedings of the IEEE International Test Conference in Asia, 2024

IDLD: Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery for Aerospace Applications.

Aibin Yan, Chen Dong, Xing Guo, Jie Song, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023

Design of True Random Number Generator Based on Multi-Ring Convergence Oscillator Using Short Pulse Enhanced Randomness.

Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Senling Wang, Xiaoqing Wen

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

Overhead Optimized and Quadruple-Node-Upset Self-Recoverable Latch Design Based on Looped C-Element Matrix.

Zhengfeng Huang, Dongxing Ma, Runwu Ji, Huaguo Liang, Aibin Yan, Tai Song, Tianming Ni

IEEE Trans. Aerosp. Electron. Syst., December, 2023

A Highly Robust and Low-Power Flip-Flop Cell With Complete Double-Node-Upset Tolerance for Aerospace Applications.

Aibin Yan, Yuting He, Xiaoxiao Niu, Jie Cui, Tianming Ni, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Des. Test, August, 2023

Worst-case Power Integrity Prediction Using Convolutional Neural Network.

Xiao Dong, Yufei Chen, Jun Chen, Yucheng Wang, Ji Li, Tianming Ni, Zhiguo Shi, Xunzhao Yin, Cheng Zhuo

ACM Trans. Design Autom. Electr. Syst., July, 2023

Designs of BCD Adder Based on Excess-3 Code in Quantum-Dot Cellular Automata.

Aibin Yan, Runqi Liu, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen, Jiliang Zhang

IEEE Trans. Circuits Syst. II Express Briefs, June, 2023

LDAVPM: A Latch Design and Algorithm-Based Verification Protected Against Multiple-Node-Upsets in Harsh Radiation Environments.

Aibin Yan, Zhixing Li, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments.

Aibin Yan, Zhixing Li, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., June, 2023

A Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch.

Zhengfeng Huang, Lanxi Duan, Yan Zhang, Tianming Ni, Aibin Yan

IEEE Trans. Aerosp. Electron. Syst., June, 2023

A Flexible and High-Performance Lattice-Based Post-Quantum Crypto Secure Coprocessor.

Aobo Li, Dongsheng Liu, Cong Zhang, Xiang Li, Shuo Yang, Xingjie Liu, Jiahao Lu, Xuecheng Zou, Ang Hu, Tianming Ni

IEEE Trans. Ind. Informatics, 2023

Two Double-Node-Upset-Hardened Flip-Flop Designs for High-Performance Applications.

Aibin Yan, Aoran Cao, Zhengfeng Huang, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen, Jiliang Zhang

IEEE Trans. Emerg. Top. Comput., 2023

Fault-avoidance C-element based low overhead and TNU-resilient latch.

Zhengfeng Huang, Zhouyu Gong, Dongxing Ma, Xiaolei Wang, Yingchun Lu, Wenfa Zhan, Huaguo Liang, Tianming Ni

Microelectron. J., 2023

A Low Overhead and Double-Node-Upset Self-Recoverable Latch.

Aibin Yan, Fan Xia, Tianming Ni, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2023

Design of A Highly Reliable and Low-Power SRAM With Double-Node Upset Recovery for Safety-critical Applications.

Aibin Yan, Jing Xiang, Zhengfeng Huang, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2023

A Low Area and Low Delay Latch Design with Complete Double-Node-Upset-Recovery for Aerospace Applications.

Aibin Yan, Shaojie Wei, Jinjun Zhang, Jie Cui, Jie Song, Tianming Ni, Patrick Girard, Xiaoqing Wen

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

Two Highly Reliable and High-Speed SRAM Cells for Safety-Critical Applications.

Aibin Yan, Yang Chang, Jing Xiang, Hao Luo, Jie Cui, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

A Robust and High-Performance Flip-Flop with Complete Soft-Error Recovery.

Aibin Yan, Xuehua Li, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen

Proceedings of the 10th International Conference on Dependable Systems and Their Applications, 2023

SASL-JTAG: A Light-Weight Dependable JTAG.

Senling Wang, Shaoqi Wei, Jun Ma, Hiroshi Kai, Yoshinobu Higami, Hiroshi Takahashi, Akihiro Shimizu, Xiaoqing Wen, Tianming Ni

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

Advanced DICE Based Triple-Node-Upset Recovery Latch with Optimized Overhead for Space Applications.

Aibin Yan, Xuehua Li, Zhongyu Gao, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

Enhancing Defect Diagnosis and Localization in Wafer Map Testing Through Weakly Supervised Learning.

Mu Nie, Wen Jiang, Wankou Yang, Senling Wang, Xiaoqing Wen, Tianming Ni

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

A Lightweight and Machine-Learning-Resistant PUF framework based on Nonlinear Structure and Obfuscating Challenges.

Tianming Ni, Fei Li, Qingsong Peng, Senling Wang, Xiaoqing Wen

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2023

2022

Calibration of SQUID Magnetometers in Multichannel MCG System Based on Bi-Planar Coil.

Kang Yang, Dan Wu, Wengen Gao, Tianming Ni, Qiannian Zhang, Hongwei Zhang, Dengchao Huang

IEEE Trans. Instrum. Meas., 2022

Novel Quadruple-Node-Upset-Tolerant Latch Designs With Optimized Overhead for Reliable Computing in Harsh Radiation Environments.

Aibin Yan, Zhelong Xu, Xiangfeng Feng, Jie Cui, Zhili Chen, Tianming Ni, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Trans. Emerg. Top. Comput., 2022

Design of True Random Number Generator Based on Multi-Stage Feedback Ring Oscillator.

Jianguo Cui, Maoxiang Yi, Di Cao, Liang Yao, Xinyu Wang, Huaguo Liang, Zhengfeng Huang, Haochen Qi, Tianming Ni, Yingchun Lu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

Fortune: A New Fault-Tolerance TSV Configuration in Router-Based Redundancy Structure.

Qi Xu, Hao Geng, Tianming Ni, Song Chen, Bei Yu, Yi Kang, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A double-node-upset completely tolerant CMOS latch design with extremely low cost for high-performance applications.

Aibin Yan, Kuikui Qian, Tai Song, Zhengfeng Huang, Tianming Ni, Yu Chen, Xiaoqing Wen

Integr., 2022

Valid test pattern identification for VLSI adaptive test.

Tai Song, Tianming Ni, Zhengfeng Huang, Jinlei Wan

Integr., 2022

Broadcast-TDMA: A Cost-Effective Fault-Tolerance Method for TSV Lifetime Reliability Enhancement.

Tianming Ni, Jingchang Bian, Zhao Yang, Mu Nie, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen

IEEE Des. Test, 2022

Cost-Optimized and Robust Latch Hardened against Quadruple Node Upsets for Nanoscale CMOS.

Aibin Yan, Shukai Song, Jixiang Zhang, Jie Cui, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen, Patrick Girard

Proceedings of the IEEE International Test Conference in Asia, 2022

A Highly Robust, Low Delay and DNU-Recovery Latch Design for Nanoscale CMOS Technology.

Aibin Yan, Zhen Zhou, Shaojie Wei, Jie Cui, Yong Zhou, Tianming Ni, Patrick Girard, Xiaoqing Wen

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

SCLCRL: Shuttling C-elements based Low-Cost and Robust Latch Design Protected against Triple Node Upsets in Harsh Radiation Environments.

Aibin Yan, Zhixing Li, Shiwei Huang, Zijie Zhai, Xiangyu Cheng, Jie Cui, Tianming Ni, Xiaoqing Wen, Patrick Girard

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

A Lightweight M_TRNG Design based on MUX Cell Entropy using Multiphase Sampling.

Liang Yao, Huaguo Liang, Hong Zhang, Tianming Ni, Maoxiang Yi, Yingchun Lu

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2022

MRCO: A Multi-ring Convergence Oscillator-based High-Efficiency True Random Number Generator.

Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2022

2021

A Novel TDMA-Based Fault Tolerance Technique for the TSVs in 3D-ICs Using Honeycomb Topology.

Tianming Ni, Zhao Yang, Hao Chang, Xiaoqiang Zhang, Lin Lu, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen

IEEE Trans. Emerg. Top. Comput., 2021

A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC.

Tianming Ni, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications.

Aibin Yan, Zhihui He, Jun Zhou, Jie Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard

Microelectron. J., 2021

A high-speed and triple-node-upset recovery latch with heterogeneous interconnection.

Zhengfeng Huang, Hao Wang, Yang Ang, Huaguo Liang, Yiming Ouyang, Tianming Ni

Microelectron. J., 2021

LC-TSL: A low-cost triple-node-upset self-recovery latch design based on heterogeneous elements for 22 nm CMOS.

Zhengfeng Huang, Shangjie Pan, Hao Wang, Huaguo Liang, Tianming Ni

Microelectron. J., 2021

Design of MNU-Resilient latches based on input-split C-elements.

Zhengfeng Huang, Xiandong Li, Zhouyu Gong, Huaguo Liang, Yingchun Lu, Yiming Ouyang, Tianming Ni

Microelectron. J., 2021

Design of node separated triple-node-upset self-recoverable latch.

Zhengfeng Huang, Di Cao, Jianguo Cui, Yingchun Lu, Huaguo Liang, Yiming Ouyang, Tianming Ni, Zhenmin Li

Microelectron. J., 2021

Cross-Layer Dual Modular Redundancy Hardened Scheme of Flip-Flop Design Based on Sense-Amplifier.

Zhengfeng Huang, Zian Su, Tianming Ni, Qi Xu, Haochen Qi, Yingchun Lu, Manzi Eric, Hui Xu

J. Circuits Syst. Comput., 2021

Chip test pattern reordering method using adaptive test to reduce cost for testing of ICs.

Tai Song, Huaguo Liang, Zhengfeng Huang, Tianming Ni, Ying Sun

IEICE Electron. Express, 2021

Design of Radiation Hardened Latch and Flip-Flop with Cost-Effectiveness for Low-Orbit Aerospace Applications.

Aibin Yan, Aoran Cao, Zhelong Xu, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen

J. Electron. Test., 2021

A Test Method for Large-size TSV Considering Resistive Open Fault and Leakage Fault Coexistence.

Chang Hao, Xu Yong, Tianming Ni

Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021

A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch.

Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

Parallel DICE Cells and Dual-Level CEs based 3-Node-Upset Tolerant Latch Design for Highly Robust Computing.

Aibin Yan, Zijie Zhai, Lele Wang, Jixiang Zhang, Ningning Cui, Tianming Ni, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2021

A N: 1 Single-Channel TDMA Fault-Tolerant Technique for TSVs in 3D-ICs.

Huaguo Liang, Danqing Li, Zhao Yang, Tianming Ni, Zhengfeng Huang, Cuiyun Jiang

Proceedings of the IEEE International Test Conference in Asia, 2021

Kelvin Bridge Structure Based TSV Test for Weak Faults.

Chang Hao, Zhengfeng Huang, Tianming Ni

Proceedings of the IEEE International Test Conference in Asia, 2021

Continuous-time Delta-Sigma Modulators: Single-loop versus MASH.

Liang Qi, Tianming Ni, Xinyu Qin, Mingyi Chen, Yongfu Li, Guoxing Wang

Proceedings of the 18th International SoC Design Conference, 2021

A 4NU-Recoverable and HIS-Insensitive Latch Design for Highly Robust Computing in Harsh Radiation Environments.

Aibin Yan, Aoran Cao, Zhengzheng Fan, Zhelong Xu, Tianming Ni, Patrick Girard, Xiaoqing Wen

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020

Architecture of Cobweb-Based Redundant TSV for Clustered Faults.

Tianming Ni, Dongsheng Liu, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan

IEEE Trans. Very Large Scale Integr. Syst., 2020

Novel Speed-and-Power-Optimized SRAM Cell Designs With Enhanced Self-Recoverability From Single- and Double-Node Upsets.

Aibin Yan, Yan Chen, Yuanjie Hu, Jun Zhou, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen

IEEE Trans. Circuits Syst., 2020

Non-Intrusive Online Distributed Pulse Shrinking-Based Interconnect Testing in 2.5D IC.

Tianming Ni, Hao Chang, Tai Song, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen

IEEE Trans. Circuits Syst., 2020

LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults.

Tianming Ni, Yao Yao, Hao Chang, Lin Lu, Huaguo Liang, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Information Assurance Through Redundant Design: A Novel TNU Error-Resilient Latch for Harsh Radiation Environment.

Aibin Yan, Yuanjie Hu, Jie Cui, Zhili Chen, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Computers, 2020

CC-RTSV: Cross-Cellular Based Redundant TSV Design for 3D ICs.

Tianming Ni, Yue Shu, Hao Chang, Lin Lu, Guangzhen Dai, Shidong Zhu, Chengming Qu, Zhengfeng Huang

J. Circuits Syst. Comput., 2020

A low critical path delay structure for composite field AES S-box based on constant matrices multiplication merging.

Xiaoqiang Zhang, Xinggan Zhang, Lan Tang, Xinxing Zheng, Tianming Ni, Ning Wu

IEICE Electron. Express, 2020

Pattern Reorder for Test Cost Reduction Through Improved SVMRANK Algorithm.

Tai Song, Huaguo Liang, Tianming Ni, Zhengfeng Huang, Yingchun Lu, Jinlei Wan, Aibin Yan

IEEE Access, 2020

A SEU Immune Flip-Flop with Low Overhead.

Zhengfeng Huang, Xiandong Li, Shangjie Pan, Min Wang, Tianming Ni

Proceedings of the Machine Learning for Cyber Security - Third International Conference, 2020

Design of a Highly Reliable SRAM Cell with Advanced Self-Recoverability from Soft Errors.

Zhengda Dou, Aibin Yan, Jun Zhou, Yuanjie Hu, Yan Chen, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2020

A Sextuple Cross-Coupled SRAM Cell Protected against Double-Node Upsets.

Aibin Yan, Yan Chen, Jun Zhou, Jie Cui, Tianming Ni, Xiaoqing Wen, Patrick Girard

Proceedings of the 29th IEEE Asian Test Symposium, 2020

2019

A Pulse Shrinking-Based Test Solution for Prebond Through Silicon via in 3-D ICs.

Maoxiang Yi, Jingchang Bian, Tianming Ni, Cuiyun Jiang, Hao Chang, Huaguo Liang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

An enhanced time-to-digital conversion solution for pre-bond TSV dual faults testing.

Tianming Ni, Hao Chang, Xian Sun, Xia Xiuzhen, Zhengfeng Huang

IEICE Electron. Express, 2019

Temperature-Aware Floorplanning for Fixed-Outline 3D ICs.

Tianming Ni, Hao Chang, Shidong Zhu, Lin Lu, Xueyun Li, Qi Xu, Huaguo Liang, Zhengfeng Huang

IEEE Access, 2019

A Novel Built-In Self-Repair Scheme for 3D Memory.

Tianming Ni, Hao Chang, Yao Yao, Xueyun Li, Zhengfeng Huang

IEEE Access, 2019

Design of a Novel Self-Recoverable SRAM Cell Protected Against Soft Errors.

Aibin Yan, Jun Zhou, Yuanjie Hu, Yan Chen, Zhen Wu, Tianming Ni

Proceedings of the 6th International Conference on Dependable Systems and Their Applications, 2019

2018

Research on physical unclonable functions circuit based on three dimensional integrated circuit.

Tianming Ni, Hao Chang, Xiaoqiang Zhang, Hao Xiao, Zhengfeng Huang

IEICE Electron. Express, 2018

A novel in-field TSV repair method for latent faults.

Tianming Ni, Hao Chang, Haochen Qi, Zhengfeng Huang

IEICE Electron. Express, 2018

An All-Digital and Jitter-Quantizing True Random Number Generator in SRAM-Based FPGAs.

Xiumin Xu, Huaguo Liang, Kai Zhou, Gaoliang Ma, Zhengfeng Huang, Maoxiang Yi, Tianming Ni, Yingchun Lu

Proceedings of the 27th IEEE Asian Test Symposium, 2018

A Hybrid DMR Latch to Tolerate MNU Using TDICE and WDICE.

Zhengfeng Huang, Yangyang Zhang, Zian Su, Huaguo Liang, Huijie Yao, Tianming Ni

Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017

A Region-Based Through-Silicon via Repair Method for Clustered Faults.

Tianming Ni, Huaguo Liang, Mu Nie, Xiumin Xu, Aibin Yan, Zhengfeng Huang

IEICE Trans. Electron., 2017

A highly reliable butterfly PUF in SRAM-based FPGAs.

Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xiangsheng Fang, Tianming Ni, Maoxiang Yi

IEICE Electron. Express, 2017

A single event transient detector in SRAM-based FPGAs.

Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yingchun Lu, Aibin Yan, Tianming Ni, Maoxiang Yi

IEICE Electron. Express, 2017

Vernier ring based pre-bond through silicon vias test in 3D ICs.

Tianming Ni, Mu Nie, Huaguo Liang, Jingchang Bian, Xiumin Xu, Xiangsheng Fang, Zhengfeng Huang, Xiaoqing Wen

IEICE Electron. Express, 2017

2016

NBTI mitigation by M-IVC with input duty cycle and randomness constraints.

Maoxiang Yi, Xiaohong Liu, Qingwu Wu, Tianming Ni, Zhengfeng Huang, Huaguo Liang

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016