Tiancheng Gong

According to our database, Tiancheng Gong authored at least 7 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Transport mechanism in Hf0.5Zr0.5O2-based ferroelectric diodes.

Haoran Yu, Tiancheng Gong, Peng Yuan, Yuan Wang, Zhaomeng Gao, Xiaoxin Xu, Ying Sun, Ran Cheng, Jianfeng Gao, Junfeng Li, Bing Chen, Qing Luo

Sci. China Inf. Sci., December, 2023

Freely switching between ferroelectric and resistive switching in Hf0.5Zr0.5O2 films and its application on high accuracy on-chip deep neural networks.

Pengfei Jiang, Kunran Xu, Jie Yu, Yannan Xu, Peng Yuan, Yuan Wang, Yuting Chen, Yaxin Ding, Shuxian Lv, Zhiwei Dang, Tiancheng Gong, Yang Yang, Yan Wang, Qing Luo

Sci. China Inf. Sci., February, 2023

First Demonstration of a Design Methodology for Highly Reliable Operation at High Temperature on 128kb 1T1C FeRAM Chip.

Tiancheng Gong, Lihua Xu, Wei Wei, Pengfei Jiang, Peng Yuan, Bowen Nie, Yuanquan Huang, Yuan Wang, Yang Yang, Jianfeng Gao, Junfeng Li, Jun Luo, Lingfei Wang, Jianguo Yang, Qing Luo, Ling Li, Steve S. Chung, Ming Liu

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

16-layer 3D Vertical RRAM with Low Read Latency (18ns), High Nonlinearity (>5000) and Ultra-low Leakage Current (~pA) Self-Selective Cells.

Yaxin Ding, Jianguo Yang, Yu Liu, Jianfeng Gao, Yuan Wang, Pengfei Jiang, Shuxian Lv, Yuting Chen, Boping Wang, Wei Wei, Tiancheng Gong, Kanhao Xue, Qing Luo, Xiangshui Miao, Ming Liu

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2021

Investigation of weight updating modes on oxide-based resistive switching memory synapse towards neuromorphic computing applications.

Qingting Ding, Tiancheng Gong, Jie Yu, Xiaoxin Xu, Xiaoyan Li, Hangbing Lv, Jianguo Yang, Qing Luo, Peng Yuan, Feng Zhang, Ming Liu

Sci. China Inf. Sci., 2021

2020

A Low Power 4T2C nvSRAM With Dynamic Current Compensation Operation Scheme.

Chao Liu, Jianguo Yang, Pengfei Jiang, Qiao Wang, Donglin Zhang, Tiancheng Gong, Qingting Ding, Yuling Zhao, Qing Luo, Xiaoyong Xue, Hangbing Lv, Ming Liu

IEEE Trans. Very Large Scale Integr. Syst., 2020

2019

A 0.75 V reference clamping sense amplifier for low-power high-density ReRAM with dynamic pre-charge technique.

Jiahao Yin, Chunmeng Dou, Danian Dong, Jie Yu, Xiaoxin Xu, Qing Luo, Tiancheng Gong, Lu Tai, Peng Yuan, Xiaoyong Xue, Ming Liu, Hangbing Lv

IEICE Electron. Express, 2019