Tianchen Gu

According to our database, Tianchen Gu authored at least 5 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

D³PBO: Dynamic Domain Decomposition-based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing.

Aidong Zhao, Tianchen Gu, Zhaori Bi, Fan Yang, Changhao Yan, Xuan Zeng, Zixiao Lin, Wenchuang Walter Hu, Dian Zhou

ACM Trans. Design Autom. Electr. Syst., May, 2024

BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis.

Tianchen Gu, Wangzhen Li, Aidong Zhao, Zhaori Bi, Xudong Li, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2024

tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling.

Tianchen Gu, Jiaqi Wang, Zhaori Bi, Changhao Yan, Fan Yang, Yajie Qin, Tao Cui, Xuan Zeng

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing.

Tianchen Gu, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2020

An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits.

Xiaodong Wang, Tianchen Gu, Changhao Yan, Xiulong Wu, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020