Tiago D. Perez

According to our database, Tiago D. Perez authored at least 14 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Impact of Orientation on the Bias of SRAM-Based PUFs.

Zain Ul Abideen, Rui Wang, Tiago Diadami Perez, Geert Jan Schrijen, Samuel Pagliarini

IEEE Des. Test, June, 2024

2023

A Security-Aware and LUT-Based CAD Flow for the Physical Synthesis of hASICs.

Zain Ul Abideen, Tiago Diadami Perez, Mayler G. A. Martins, Samuel Pagliarini

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023

Hardware Trojan Insertion in Finalized Layouts: From Methodology to a Silicon Demonstration.

Tiago D. Perez, Samuel Pagliarini

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2023

SALSy: Security-Aware Layout Synthesis.

Mohammad Eslami, Tiago D. Perez, Samuel Pagliarini

CoRR, 2023

2022

A Security-aware and LUT-based CAD Flow for the Physical Synthesis of eASICs.

Zain Ul Abideen, Tiago Diadami Perez, Mayler G. A. Martins, Samuel Pagliarini

CoRR, 2022

A Pragmatic Methodology for Blind Hardware Trojan Insertion in Finalized Layouts.

Alexander Hepp, Tiago D. Perez, Samuel Pagliarini, Georg Sigl

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

G-GPU: A Fully-Automated Generator of GPU-like ASIC Accelerators.

Tiago D. Perez, Marcio M. Gonçalves, Leonardo Gobatto, Marcelo Brandalero, José Rodrigo Azambuja, Samuel Pagliarini

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

A Side-Channel Hardware Trojan in 65nm CMOS with 2μW precision and Multi-bit Leakage Capability.

Tiago D. Perez, Samuel Pagliarini

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

Hardware Trojan Insertion in Finalized Layouts: a Silicon Demonstration.

Tiago D. Perez, Samuel Pagliarini

CoRR, 2021

Side-Channel Trojan Insertion - a Practical Foundry-Side Attack via ECO.

Tiago D. Perez, Malik Imran, Pablo Vaz, Samuel Pagliarini

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

From FPGAs to Obfuscated eASICs: Design and Security Trade-offs.

Zain Ul Abideen, Tiago Diadami Perez, Samuel Pagliarini

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2021

2020

A Survey on Split Manufacturing: Attacks, Defenses, and Challenges.

Tiago D. Perez, Samuel Pagliarini

IEEE Access, 2020

2016

Architecture design and implementation of key components of an OFDM transceiver for IEEE 802.15.4g.

Denise C. Alves, Gabriel S. da Silva, Eduardo R. de Lima, Cesar G. Chaves, Daniel Urdaneta, Tiago D. Perez, Maique C. Garcia

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

Demo: FPGA implementation of an IEEE802.15.4g MR-OFDM baseband modem for smart metering utility networks.

Augusto F. R. Queiroz, Gabriel S. da Silva, Cesar G. Chaves, Tiago D. Perez, Daniel G. Urdanetta, Denise C. Alves, Maique C. Garcia, Eduardo R. de Lima

Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015