Ti-Yen Yen

According to our database1, Ti-Yen Yen authored at least 8 papers between 1993 and 1998.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

1998
Performance Estimation for Real-Time Distributed Embedded Systems.
IEEE Trans. Parallel Distributed Syst., 1998

Efficient Algorithms for Interface Timing Verification.
Formal Methods Syst. Des., 1998

1997
A Real-Time RTL Engineering-Change Method Supporting On-Line Debugging for Logic-Emulation Applications.
Proceedings of the 34st Conference on Design Automation, 1997

DP-Gen: a datapath generator for multiple-FPGA applications.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996
An efficient graph algorithm for FSM scheduling.
IEEE Trans. Very Large Scale Integr. Syst., 1996

1995
Sensitivity-driven co-synthesis of distributed embedded systems.
Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995

Communication synthesis for distributed embedded systems.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1993
Optimal Scheduling of Finite-State Machines.
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993


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