Thomas Wild
Orcid: 0000-0002-2455-3625
According to our database1,
Thomas Wild
authored at least 137 papers
between 2002 and 2024.
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Bibliography
2024
IEEE Trans. Very Large Scale Integr. Syst., January, 2024
EPIC-Q: Equivalent-Policy Invariant Comparison Enhanced Transfer Q-learning for Run-Time SoC Performance-Power Optimization.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2024
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2024
Proceedings of the 32nd Euromicro International Conference on Parallel, 2024
QoS-Aware Dynamic Frequency Scaling for Mixed-Critical Systems based on Shielded Reinforcement Learning.
Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2024
FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar.
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024
ecoNIC: Saving Energy Through SmartNIC-Based Load Balancing of Mixed-Critical Ethernet Traffic.
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024
EMDRIVE Architecture: Embedded Distributed Computing and Diagnostics from Sensor to Edge.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024
Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024
2023
FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs.
Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023
Proceedings of the 31st Euromicro International Conference on Parallel, 2023
Proceedings of the IEEE Conference on Network Function Virtualization and Software Defined Networks, 2023
LCT-TL : Learning Classifier Table (LCT) with Transfer Learning for runtime SoC performance-power optimization.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023
LCT-DER: Learning Classifier Table with Dynamic-Sized Experience Replay for Run-time SoC Performance-Power Optimization.
Proceedings of the Companion Proceedings of the Conference on Genetic and Evolutionary Computation, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the Architecture of Computing Systems - 36th International Conference, 2023
2022
rmap: An R package to plot and compare tabular data on customizable maps across scenarios and time.
J. Open Source Softw., 2022
Int. J. Parallel Program., 2022
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022
SmartNIC-based Load Management and Network Health Monitoring for Time Sensitive Applications.
Proceedings of the 2022 IEEE/IFIP Network Operations and Management Symposium, 2022
GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization.
Proceedings of the Architecture of Computing Systems - 35th International Conference, 2022
2021
Exploring a Hybrid Voting-based Eviction Policy for Caches and Sparse Directories on Manycore Architectures.
Microprocess. Microsystems, November, 2021
Protection switching schemes and mapping strategies for fail-operational hard real-time NoCs.
Microprocess. Microsystems, November, 2021
plutus: An R package to calculate electricity investments and stranded assets from the Global Change Analysis Model (GCAM).
J. Open Source Softw., 2021
Int. J. Parallel Program., 2021
DySHARQ: Dynamic Software-Defined Hardware-Managed Queues for Tile-Based Architectures.
Int. J. Parallel Program., 2021
Proceedings of the MEMSYS 2021: The International Symposium on Memory Systems, Washington, USA, September 27, 2021
Long Short-Term Memory Neural Network-based Power Forecasting of Multi-Core Processors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the CoNEXT '21: The 17th International Conference on emerging Networking EXperiments and Technologies, Virtual Event, Munich, Germany, December 7, 2021
2020
Machine Learning Approaches for Efficient Design Space Exploration of Application-Specific NoCs.
ACM Trans. Design Autom. Electr. Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Inter-Server RSS: Extending Receive Side Scaling for Inter-Server Workload Distribution.
Proceedings of the 28th Euromicro International Conference on Parallel, 2020
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
Exploring Task and Channel Mapping Strategies in Fail-Operational and Hard Real-Time NoCs.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
X-Centric: A Survey on Compute-, Memory- and Application-Centric Computer Architectures.
Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020
On-Chip Democracy: A Study on the Use of Voting Systems for Computer Cache Memory Management.
Proceedings of the IEEE International Conference on Industrial Engineering and Engineering Management, 2020
Proceedings of the Architecture of Computing Systems - ARCS 2020, 2020
2019
Register Requirement Minimization of Fixed-Depth Pipelines for Streaming Data Applications.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
CoD: Coherence-on-Demand - Runtime Adaptable Working Set Coherence for DSM-Based Manycore Architectures.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
SHARQ: Software-Defined Hardware-Managed Queues for Tile-Based Manycore Architectures.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
APEC: improved acknowledgement prioritization through erasure coding in bufferless NoCs.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019
Channel mapping strategies for effective protection switching in fail-operational hard real-time NoCs.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019
Proceedings of the International Symposium on Memory Systems, 2019
Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019
Multi-Objective Optimization of Channel Mapping for Fail-Operational Hybrid TDM NoCs.
Proceedings of the Seventh International Symposium on Computing and Networking Workshops, 2019
The information processing factory: a paradigm for life cycle management of dependable systems.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019
Proceedings of the 2019 ACM/IEEE Symposium on Architectures for Networking and Communications Systems, 2019
2018
Proc. IEEE, 2018
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018
2017
Efficient task spawning for shared memory and message passing in many-core architectures.
J. Syst. Archit., 2017
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Proceedings of the 18th International Conference on Parallel and Distributed Computing, 2017
Proceedings of the Euromicro Conference on Digital System Design, 2017
A non-intrusive, operating system independent spinlock profiler for embedded multicore systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Reducing Data Center Resource Over-Provisioning Through Dynamic Load Management for Virtualized Network Functions.
Proceedings of the Architecture of Computing Systems - ARCS 2017, 2017
2016
Microelectron. Reliab., 2016
it Inf. Technol., 2016
Proceedings of the High Performance Computing - 31st International Conference, 2016
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016
Hardware acceleration of signature matching through multi-layer transition bit masking.
Proceedings of the 26th International Telecommunication Networks and Applications Conference, 2016
Proceedings of the International Symposium on Integrated Circuits, 2016
Resolving Performance Interference in SR-IOV Setups with PCIe Quality-of-Service Extensions.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
Proceedings of the Architecture of Computing Systems - ARCS 2016, 2016
Proceedings of the Architecture of Computing Systems - ARCS 2016, 2016
2015
Denial-of-Service attacks on PCI passthrough devices: Demonstrating the impact on network- and storage-I/O performance.
J. Syst. Archit., 2015
it Inf. Technol., 2015
Proceedings of the Symposium on High Performance Computing, 2015
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Real-time capable CAN to AVB ethernet gateway using frame aggregation and scheduling.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the Architecture of Computing Systems - ARCS 2015, 2015
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015
A Hardware/Software Approach for Mitigating Performance Interference Effects in Virtualized Environments Using SR-IOV.
Proceedings of the 8th IEEE International Conference on Cloud Computing, 2015
2014
A Layered Modeling and Simulation Approach to investigate Resource-aware Computing in MPSoCs.
CoRR, 2014
A network virtualization approach for performance isolation in controller area network (CAN).
Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014
Proceedings of the 2014 IEEE International Conference on High Performance Computing and Communications, 2014
Proceedings of the 2014 Forum on Specification and Design Languages, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Performance Isolation Exposure in Virtualized Platforms with PCI Passthrough I/O Sharing.
Proceedings of the Architecture of Computing Systems - ARCS 2014, 2014
The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure.
Proceedings of the ARCS 2014, 2014
2013
ACM Trans. Reconfigurable Technol. Syst., 2013
Microprocess. Microsystems, 2013
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
Proceedings of the 43. Jahrestagung der Gesellschaft für Informatik, 2013
AUTO-GS: Self-Optimization of NoC Traffic through Hardware Managed Virtual Connections.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
New Algorithm for Analysis of Off-target Effects in siRNA Screens.
Proceedings of the BIOINFORMATICS 2013 - Proceedings of the International Conference on Bioinformatics Models, Methods and Algorithms, Barcelona, Spain, 11, 2013
HW-OSQM: Reducing the Impact of Event Signaling by Hardware-Based Operating System Queue Manipulation.
Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013
2012
ACM Trans. Archit. Code Optim., 2012
System-level software performance simulation considering out-of-order processor execution.
Proceedings of the 2012 International Symposium on System on Chip, 2012
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Enhanced Reliability in Tiled Manycore Architectures through Transparent Task Relocation.
Proceedings of the ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany, 2012
2011
Trans. High Perform. Embed. Archit. Compil., 2011
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011
Proceedings of the Multiprocessor System-on-Chip - Hardware Design and Tool Integration., 2011
2010
Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach Message Dependent Deadlocks in On-chip Networks.
Proceedings of the NOCS 2010, 2010
Proceedings of the High Performance Embedded Architectures and Compilers, 2010
Proceedings of the 2010 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2010
FlexPath NP - Flexible, Dynamically Reconfigurable Processing Paths in Network Processors.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010
2009
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
Improving memory subsystem performance in network processors with smart packet segmentation.
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008
Benchmarking Domain Specific Processors: A Case Study of Evaluating a Smart Card Processor Design.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008
Proceedings of the Architecture of Computing Systems, 2008
Proceedings of the Architecture of Computing Systems, 2008
2007
Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications.
J. Syst. Archit., 2007
A Programmable Stream Processing Engine for Packet Manipulation in Network Processors.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007
2006
Int. J. High Perform. Comput. Netw., 2006
Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications.
Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006
Performance evaluation for system-on-chip architectures using trace-based transaction level simulation.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006
2005
Des. Autom. Embed. Syst., 2005
Proceedings of the 12th IEEE International Conference on Electronics, 2005
FlexPath NP: a network processor concept with application-driven flexible processing paths.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
2003
Ein rekursives Verfahren zur Abbildung und zum Scheduling von Prozess-Graphen mit Kontrollabhängigkeiten.
PhD thesis, 2003
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003
A Constructive Algorithm with Look-Ahead for Mapping and Scheduling of Task Graphs with Conditional Edges.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003
2002
Proceedings of the Seventh IEEE Symposium on Computers and Communications (ISCC 2002), 2002
Proceedings of the 16th Annual International Symposium on High Performance Computing Systems and Applications, 2002