Thomas Unterluggauer

Orcid: 0000-0001-8317-648X

According to our database1, Thomas Unterluggauer authored at least 25 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
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PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2023
Scatter and Split Securely: Defeating Cache Contention and Occupancy Attacks.
Proceedings of the 44th IEEE Symposium on Security and Privacy, 2023

CacheFX: A Framework for Evaluating Cache Security.
Proceedings of the 2023 ACM Asia Conference on Computer and Communications Security, 2023

2022
Chameleon Cache: Approximating Fully Associative Caches with Random Replacement to Prevent Contention-Based Cache Attacks.
Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022

2021
Seeds of SEED: A Side-Channel Resilient Cache Skewed by a Linear Function over a Galois Field.
Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021

Speculative interference attacks: breaking invisible speculation schemes.
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2020
Isap v2.0.
IACR Trans. Symmetric Cryptol., 2020

2019
MEAS: memory encryption and authentication secure against side-channel attacks.
J. Cryptogr. Eng., 2019

ScatterCache: Thwarting Cache Attacks via Cache Set Randomization.
Proceedings of the 28th USENIX Security Symposium, 2019

Protecting RISC-V Processors against Physical Attacks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Sponge-Based Control-Flow Protection for IoT Devices.
Proceedings of the 2018 IEEE European Symposium on Security and Privacy, 2018

High speed ASIC implementations of leakage-resilient cryptography.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
ISAP - Towards Side-Channel Secure Authenticated Encryption.
IACR Trans. Symmetric Cryptol., 2017

Transparent Memory Encryption and Authentication.
IACR Cryptol. ePrint Arch., 2017

Securing Memory Encryption and Authentication Against Side-Channel Attacks Using Unprotected Primitives.
IACR Cryptol. ePrint Arch., 2017

Leakage Bounds for Gaussian Side Channels.
IACR Cryptol. ePrint Arch., 2017

2016
Side-Channel Plaintext-Recovery Attacks on Leakage-Resilient Encryption.
IACR Cryptol. ePrint Arch., 2016

Exploiting the Physical Disparity: Side-Channel Attacks on Memory Encryption.
IACR Cryptol. ePrint Arch., 2016

Group Signatures with Linking-Based Revocation: A Pragmatic Approach for Efficient Revocation Checks.
IACR Cryptol. ePrint Arch., 2016

Concealing Secrets in Embedded Processors Designs.
IACR Cryptol. ePrint Arch., 2016

ISAP - Authenticated Encryption Inherently Secure Against Passive Side-Channel Attacks.
IACR Cryptol. ePrint Arch., 2016

Linking-Based Revocation for Group Signatures: A Pragmatic Approach for Efficient Revocation Checks.
Proceedings of the Paradigms in Cryptology - Mycrypt 2016. Malicious and Exploratory Cryptology, 2016

2014
Efficient Pairings and ECC for Embedded Systems.
IACR Cryptol. ePrint Arch., 2014

Adding Controllable Linkability to Pairing-Based Group Signatures For Free.
IACR Cryptol. ePrint Arch., 2014

Practical Attack on Bilinear Pairings to Disclose the Secrets of Embedded Devices.
Proceedings of the Ninth International Conference on Availability, 2014

2013
8/16/32 Shades of Elliptic Curve Cryptography on Embedded Processors.
Proceedings of the Progress in Cryptology - INDOCRYPT 2013, 2013


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