Thomas Makryniotis

According to our database, Thomas Makryniotis authored at least 3 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Multi-Level FeFET-Based CAM Address Decoder.

Thomas Makryniotis, Georgi Gaydadjiev, Said Hamdioui, Mottaqiallah Taouil

Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024

2017

Implementation of a motion estimation hardware accelerator on Zynq SoC.

Thomas Makryniotis, Minas Dasygenis

Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

2016

Rapid Implementation of Embedded Systems using Xilinx Zynq Platform.

Thomas Makryniotis, Minas Dasygenis

Proceedings of the SouthEast European Design Automation, 2016