Thomas M. Storey

According to our database, Thomas M. Storey authored at least 8 papers between 1977 and 2004.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2004

Testing in a high volume DSM Environment.

Thomas M. Storey

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2003

Deformations of IC Structure in Test and Yield Learning.

Wojciech Maly, Anne E. Gattiker, Thomas Zanon, Thomas J. Vogels, R. D. (Shawn) Blanton, Thomas M. Storey

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

1997

A Test Methodology for High Performance MCMs.

Thomas M. Storey, Bruce McWilliam

J. Electron. Test., 1997

1994

A Test Methodology to Support an ASEM MCM Foundry.

Thomas M. Storey, C. Lapihuska, E. Atwood, L. Su

Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1993

A Test Methodology for VLSI Chips on Silicon.

Thomas M. Storey

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1991

Stuck Fault and Current Testing Comparison Using CMOS Chip Test.

Thomas M. Storey, Wojciech Maly, John Andrews, Myron Miske

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

1990

CMOS bridging fault detection.

Thomas M. Storey, Wojciech Maly

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

1977

Delay test simulation.

Thomas M. Storey, J. W. Barry

Proceedings of the 14th Design Automation Conference, 1977