Thomas Janik
According to our database1,
Thomas Janik
authored at least 2 papers
in 2006.
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Bibliography
2006
Pattern Pruner: Automatic Pattern Size Reduction Method that Uses Computational Intelligence-Based Testing.
Proceedings of the 2006 IEEE International Test Conference, 2006
A 1.8V p(seudo)SRAM using standard 140nm DRAM technology with self adapting clocked standby operation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006