Thomas E. Bonnerud

According to our database, Thomas E. Bonnerud authored at least 4 papers between 2001 and 2005.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of four.

2005

A cost-efficient high-speed 12-bit pipeline ADC in 0.18-μm digital CMOS.

Terje Nortvedt Andersen, Bjørnar Hernes, Atle Briskemyr, Frode Telstø, Johnny Bjørnsen, Thomas E. Bonnerud, Øystein Moldsvor

IEEE J. Solid State Circuits, 2005

2004

A 97mW 110MS/s 12b pipeline ADC implemented in 0.18μm digital CMOS.

Terje N. Andersen, Atle Briskemyr, Frode Telstø, Johnny Bjørnsen, Thomas E. Bonnerud, Bjørnar Hernes, Øystein Moldsvor

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

A 97mW 110MS/s 12b Pipeline ADC Implemented in 0.18mum Digital CMOS.

Terje N. Andersen, Atle Briskemyr, Frode Telstø, Johnny Bjørnsen, Thomas E. Bonnerud, Bjørnar Hernes, Øystein Moldsvor

Proceedings of the 2004 Design, 2004

2001

A mixed-signal, functional level simulation framework based on SystemC for system-on-a-chip applications.

Thomas E. Bonnerud, Bjørnar Hernes, Trond Ytterdal

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001