Thomas Bruckschlögl

According to our database, Thomas Bruckschlögl authored at least 10 papers between 2011 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Challenges and Directions for Automated Driving Security.

David Förster, Thomas Bruckschlögl, Jason Lee Omer, Tom Schipper

Proceedings of the Computer Science in Cars Symposium, 2022

2014

SmartLoCore: A Concept for an Adaptive Power-Aware Localization Processor.

Carsten Tradowsky, Tobias Gädeke, Thomas Bruckschlögl, Wilhelm Stork, Klaus D. Müller-Glaser, Jürgen Becker

Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

A Hierarchical Architecture Description for Flexible Multicore System Simulation.

Thomas Bruckschlögl, Oliver Oey, Michael Rückauer, Timo Stripf, Jürgen Becker

Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2014

Profile-Guided Compilation of Scilab Algorithms for Multiprocessor Systems.

Jürgen Becker, Thomas Bruckschlögl, Oliver Oey, Timo Stripf, George Goulas, Nick Raptis, Christos Valouxis, Panayiotis Alefragis, Nikolaos S. Voros, Christos Gogos

Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013

Compiling Scilab to high performance embedded multicore systems.

Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Olivier Sentieys, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, Thomas Perschke

Microprocess. Microsystems, 2013

Simplify: A Framework for Enabling Fast Functional/Behavioral Validation of Multiprocessor Architectures in the Cloud.

Gabriel Marchesan Almeida, Oliver Bellaver Longhi, Thomas Bruckschlögl, Michael Hübner, Fabiano Hessel, Jürgen Becker

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Coarse-Grain Optimization and Code Generation for Embedded Multicore Systems.

George Goulas, Christos Valouxis, Panayiotis Alefragis, Nikolaos S. Voros, Christos Gogos, Oliver Oey, Timo Stripf, Thomas Bruckschlögl, Jürgen Becker, Ali El Moussawi, Maxime Naullet, Tomofumi Yuki

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012

A flexible approach for compiling scilab to reconfigurable multi-core embedded systems.

Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, Michael Hübner, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Daniel Ménard, Olivier Sentieys, Diana Göhringer, Thomas Perschke

Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

A Compilation- and Simulation-Oriented Architecture Description Language for Multicore Systems.

Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Jordy Potman, Kim Sunesen, Steven Derrien, Olivier Sentieys, Jürgen Becker

Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

2011

A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion.

Peter Figuli, Michael Hübner, Romuald Girardey, Falco Bapp, Thomas Bruckschlögl, Florian Thoma, Jörg Henkel, Jürgen Becker

Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011