Thomas A. D. Riley

Affiliations:
  • University of Oulu, Finland


According to our database1, Thomas A. D. Riley authored at least 20 papers between 1995 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2015
A 0.009-1.4-GHz Frequency Synthesizer With Suppressed Transients During VCO Band Switching.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

2007
A Second Order Delta-Sigma Frequency Discriminator with Fractional-N Divider and Multi-Bit Quantizer.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Charge-domain FIR sampler with programmable filtering coefficients.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

A quadrature charge-domain sampler with embedded FIR and IIR filtering functions.
IEEE J. Solid State Circuits, 2006

Digitally Place and Routed Up-converting Bandpass DAC.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

2005
A CMOS quadrature charge-domain sampling circuit with 66-dB SFDR up to 100 MHz.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A practical Δ-Σ modulator design method based on periodical behavior analysis.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

2004
A 50-MHz BiCMOS quadrature charge sampler and complex bandpass SC filter for narrowband applications.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A 50-MHz CMOS quadrature charge sampling circuit with 66 dB SFDR.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
A hybrid ΔΣ fractional-N frequency synthesizer.
IEEE Trans. Circuits Syst. II Express Briefs, 2003

Techniques for in-band phase noise reduction in ΔΣ synthesizers.
IEEE Trans. Circuits Syst. II Express Briefs, 2003

A complex charge sampling scheme for complex IF receivers.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

On the effects of timing jitter in charge sampling.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Charge sampling mixer with Delta-Sigma quantized impulse response.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
A low noise quadrature subsampling mixer.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
A receive path ΔΣ frequency to digital converter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

The Anthropomorphizing of Intelligent Agents.
Proceedings of the Formal Approaches to Agent-Based Systems, First International Workshop, 2000

1998
An agile ISM band frequency synthesizer with built-in GMSK data modulation.
IEEE J. Solid State Circuits, 1998

1995
Bit-Error Rate Measurements for A High Frequency Interpolated Frequency-Hopping Spread-Spectrum System.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A Sigma-Delta Frequency Discriminator Based Synthesizer.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995


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