Thilini Kaushalya Bandara

According to our database, Thilini Kaushalya Bandara authored at least 6 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Flip: Data-centric Edge CGRA Accelerator.

Dan Wu, Peng Chen, Thilini Kaushalya Bandara, Zhaoying Li, Tulika Mitra

ACM Trans. Design Autom. Electr. Syst., January, 2024

A 360 GOPS/W CGRA in a RISC-V SoC with Multi-Hop Routers and Idle-State Instructions for Edge Computing Applications.

Vishnu P. Nambiar, Y. S. Chong, Thilini Kaushalya Bandara, Dhananjaya Wijerathne, Z. Li, Rohan Juneja, Li-Shiuan Peh, T. Mitra, A. T. Do

Proceedings of the 21st International SoC Design Conference, 2024

PACE: A Scalable and Energy Efficient CGRA in a RISC-V SoC for Edge Computing Applications.

Vishnu P. Nambiar, Yi Sheng Chong, Thilini Kaushalya Bandara, Dhananjaya Wijerathne, Zhaoying Li, Rohan Juneja, Li-Shiuan Peh, Tulika Mitra, Anh Tuan Do

Proceedings of the 36th IEEE Hot Chips Symposium, 2024

2023

FLEX: Introducing FLEXible Execution on CGRA with Spatio-Temporal Vector Dataflow.

Thilini Kaushalya Bandara, Dan Wu, Rohan Juneja, Dhananjaya Wijerathne, Tulika Mitra, Li-Shiuan Peh

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022

PANORAMA: divide-and-conquer approach for mapping complex loop kernels on CGRA.

Dhananjaya Wijerathne, Zhaoying Li, Thilini Kaushalya Bandara, Tulika Mitra

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

REVAMP: a systematic framework for heterogeneous CGRA realization.

Thilini Kaushalya Bandara, Dhananjaya Wijerathne, Tulika Mitra, Li-Shiuan Peh

Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022