Thierry Lepley

According to our database1, Thierry Lepley authored at least 13 papers between 1999 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2014
Addressing System-Level Optimization with OpenVX Graphs.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2014

2013
Optimizing two-dimensional DMA transfers for scratchpad Based MPSoCs platforms.
Microprocess. Microsystems, 2013

Improving simulation speed and accuracy for many-core embedded platforms with ensemble models.
Proceedings of the Design, Automation and Test in Europe, 2013

A novel compilation approach for image processing graphs on a many-core platform with explicitly managed memory.
Proceedings of the International Conference on Compilers, 2013

2012
Optimizing explicit data transfers for data parallel applications on the cell architecture.
ACM Trans. Archit. Code Optim., 2012

Optimal 2D Data Partitioning for DMA Transfers on MPSoCs.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

An exploration methodology for a customizable OpenCL stereo-matching application targeted to an industrial multi-cluster architecture.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2005
QoS control for optimality and safety.
Proceedings of the EMSOFT 2005, 2005

Fine Grain QoS Control for Multimedia Application Software.
Proceedings of the 2005 Design, 2005

2004
A retargetable register allocation framework for embedded processors.
Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, 2004

2002
FlexCC2: An Optimizing Retargetable C Compiler for DSP Processors.
Proceedings of the Embedded Software, Second International Conference, 2002

1999
Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999


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