Thian Fatt Tay
According to our database1,
Thian Fatt Tay
authored at least 11 papers
between 2012 and 2017.
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Bibliography
2017
New Algorithm for Signed Integer Comparison in {2<sup>n+k</sup>, 2<sup>n</sup>-1, 2<sup>n</sup>+1, 2<sup>n±1</sup>-1} and Its Efficient Hardware Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
Erratum to "Efficient VLSI Implementation of 2<sup>n</sup> Scaling of Signed Integer in RNS {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+1}".
IEEE Trans. Very Large Scale Integr. Syst., 2016
A Non-Iterative Multiple Residue Digit Error Detection and Correction Algorithm in RRNS.
IEEE Trans. Computers, 2016
2015
Base Transformation With Injective Residue Mapping for Dynamic Range Reduction in RNS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
A new algorithm for single residue digit error correction in Redundant Residue Number System.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
New algorithm for signed integer comparison in four-moduli superset {2<sup>n</sup>, 2<sup>n</sup> -1, 2<sup>n</sup> +1, 2<sup>n+1</sup>-1}.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2013
Efficient VLSI Implementation of $2^{{n}}$ Scaling of Signed Integer in RNS ${\{2^{n}-1, 2^{n}, 2^{n}+1\}}$.
IEEE Trans. Very Large Scale Integr. Syst., 2013
A signed integer programmable power-of-two scaler for {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+1} RNS.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
A fast and compact circuit for integer square root computation based on Mitchell logarithmic method.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
A unified {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+1} RNS scaler with dual scaling constants.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012