Thiago Hanna Both

According to our database, Thiago Hanna Both authored at least 7 papers between 2012 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2020

TID effects on I-V characteristics of bulk CMOS STD and ELT-based devices in 600 nm.

Pablo Ilha Vaz, Gilson I. Wirth, Fábio Fedrizzi Vidor, Thiago Hanna Both

Microelectron. J., 2020

2018

Modeling and simulation of the charge trapping component of BTI and RTS.

Thiago Hanna Both, Gabriela Firpo Furtado, Gilson Inácio Wirth

Microelectron. Reliab., 2018

Design Flow Methodology for Radiation Hardened by Design CMOS Enclosed-Layout-Transistor-Based Standard-Cell Library.

Pablo Ilha Vaz, Thiago Hanna Both, Fábio Fedrizzi Vidor, Raphael Martins Brum, Gilson I. Wirth

J. Electron. Test., 2018

2014

Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs.

Fernanda Lima Kastensmidt, Jorge L. Tonfat, Thiago Hanna Both, Paolo Rech, Gilson I. Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher Frost

Microelectron. Reliab., 2014

The effects of total ionizing dose on the neutron SEU cross section of a 130 nm 4 Mb SRAM memory.

Evaldo Carlos Fonseca Pereira, Odair Lelis Goncalez, Rafael Galhardo Vaz, Claudio Antonio Federico, Thiago Hanna Both, Gilson Inácio Wirth

Proceedings of the 15th Latin American Test Workshop, 2014

Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs.

Fernanda Lima Kastensmidt, Jorge L. Tonfat, Thiago Hanna Both, Paolo Rech, Gilson I. Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher Frost

Proceedings of the 19th IEEE European Test Symposium, 2014

2012

A PLL for clock generation with automatic frequency control under TID effects.

Ricardo Vanni Dallasen, Gilson Inácio Wirth, Thiago Hanna Both

Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012