Theo Smedes

According to our database1, Theo Smedes authored at least 14 papers between 2002 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2018
An integral injector-victim current transfer model for latchup design rule optimization.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

2013
Pitfalls for CDM calibration procedures.
Microelectron. Reliab., 2013

2011
On-chip system level protection of FM antenna pin with improved linearity.
Microelectron. Reliab., 2011

2010
ESD protection for thin gate oxides in 65 nm.
Microelectron. Reliab., 2010

2009
ESD testing of devices, ICs and systems.
Microelectron. Reliab., 2009

ESD robust high-voltage active clamps.
Microelectron. Reliab., 2009

An ESD test reduction method for complex devices.
Microelectron. Reliab., 2009

2007
Selecting an appropriate ESD protection for discrete RF power LDMOSTs.
Microelectron. Reliab., 2007

2005
A 3-D Circuit Model to evaluate CDM performance of ICs.
Microelectron. Reliab., 2005

2004
A case study of ESD failures at random levels: analysis, explanation and solution.
Microelectron. Reliab., 2004

Study and validation of a power-rail ESD clamp in BiCMOS process with a reduced temperature dependency of its leakage current.
Microelectron. Reliab., 2004

2003
Role of package parasitics and substrate resistance on the Charged Device Model (CDM) failure levels -An explanation and die protection strategy.
Microelectron. Reliab., 2003

A simple design methodology for increased ESD robustness of CMOS core cells.
Proceedings of the ESSCIRC 2003, 2003

2002
The influence of technology variation on ggNMOSTs and SCRs against CDM BSD stress.
Microelectron. Reliab., 2002


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