Thaísa Leal da Silva

Orcid: 0000-0002-5356-3398

Affiliations:
  • University of Coimbra, Telecommunications Institute


According to our database1, Thaísa Leal da Silva authored at least 17 papers between 2007 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
Initiatives for smarter and more sustainable cities in two Brazilian cities: drivers, benefits and challenges.
Proceedings of the ICEGOV 2020: 13th International Conference on Theory and Practice of Electronic Governance, 2020

2016
Fast intra prediction algorithm based on texture analysis for 3D-HEVC encoders.
J. Real Time Image Process., 2016

2015
Fast mode selection algorithm based on texture analysis for 3D-HEVC intra prediction.
Proceedings of the 2015 IEEE International Conference on Multimedia and Expo, 2015

2014
Inter-view prediction of intra mode decision for high-efficiency video coding-based multiview video coding.
J. Electronic Imaging, 2014

Complexity reduction of depth intra coding for 3D video extension of HEVC.
Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014

2013
HEVC intra mode decision acceleration based on tree depth levels relationship.
Proceedings of the 30th Picture Coding Symposium, 2013

Inter-view prediction of coding tree depth for HEVC-based multiview video coding.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

Speeding up HEVC intra coding based on tree depth inter-levels correlation structure.
Proceedings of the 21st European Signal Processing Conference, 2013

2012
Fast HEVC intra mode decision based on dominant edge evaluation and tree structure dependencies.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Fast HEVC intra prediction mode decision based on EDGE direction information.
Proceedings of the 20th European Signal Processing Conference, 2012

2010
A novel macroblock-level filtering upsampling architecture for H.264/AVC scalable extension.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

A high throughput CAVLC hardware architecture with parallel coefficients processing for HDTV H.264/AVC enconding.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Design of an interlayer deblocking filter architecture for H.264/SVC based on a novel sample-level filtering order.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

High performance and low cost architecture for H.264/AVC CAVLD targeting HDTV.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

Low Cost and Memoryless CAVLD Architecture for H.264/AVC Decoder.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

High throughput scalable Motion Compensation architecture for H.264/SVC video coding standard.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2007
A Pipelined 8x8 2-D Forward DCT Hardware Architecture for H.264/AVC High Profile Encoder.
Proceedings of the Advances in Image and Video Technology, Second Pacific Rim Symposium, 2007


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