Teyuh Chou

According to our database, Teyuh Chou authored at least 6 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

AR-PIM: An Adaptive-Range Processing-in-Memory Architecture.

Teyuh Chou, Fernando García-Redondo, Paul N. Whatmough, Zhengya Zhang

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

2022

NetFlex: A 22nm Multi-Chiplet Perception Accelerator in High-Density Fan-Out Wafer-Level Packaging.

Teyuh Chou, Wei Tang, Mihai D. Rotaru, Chester Liu, Rahul Dutta, Sharon Lim Pei Siang, David Ho Soon Wee, Surya Bhattacharya, Zhengya Zhang

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2020

A 1.87-mm² 56.9-GOPS Accelerator for Solving Partial Differential Equations.

Thomas Chen, Jacob Botimer, Teyuh Chou, Zhengya Zhang

IEEE J. Solid State Circuits, 2020

2019

CASCADE: Connecting RRAMs to Extend Analog Dataflow In An End-To-End In-Memory Processing Paradigm.

Teyuh Chou, Wei Tang, Jacob Botimer, Zhengya Zhang

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

An Sram-Based Accelerator for Solving Partial Differential Equations.

Thomas Chen, Jacob Botimer, Teyuh Chou, Zhengya Zhang

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018

Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network Based on Analog Resistive Synapse.

Chih-Cheng Chang, Pin-Chun Chen, Teyuh Chou, I-Ting Wang, Boris Hudec, Che-Chia Chang, Chia-Ming Tsai, Tian-Sheuan Chang, Tuo-Hung Hou

IEEE J. Emerg. Sel. Topics Circuits Syst., 2018