Tetsuya Kamino
According to our database1,
Tetsuya Kamino
authored at least 3 papers
between 2008 and 2011.
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Bibliography
2011
A Low-Power Real-Time SIFT Descriptor Generation Engine for Full-HDTV Video Recognition.
IEICE Trans. Electron., 2011
2010
Fast and Low-Memory-Bandwidth Architecture of SIFT Descriptor Generation with Scalability on Speed and Accuracy for VGA Video.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
2008
A sub 100 mW H.264/AVC MP@L4.1 integer-pel motion estimation processor VLSI for MBAFF encoding.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008