Tetsutaro Hashimoto

According to our database, Tetsutaro Hashimoto authored at least 4 papers between 2007 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

An Adaptive-Clocking-Control Circuit With 7.5% Frequency Gain for SPARC Processors.

Tetsutaro Hashimoto, Yukihito Kawabe, Michiharu Hara, Yasushi Kakimura, Kunihiko Tajiri, Shinichiro Shirota, Ryuichi Nishiyama, Hitoshi Sakurai, Hiroshi Okano, Yasumoto Tomita, Sugio Satoh, Hideo Yamashita

IEEE J. Solid State Circuits, 2018

2017

An automated CNN recommendation system for image classification tasks.

Song Wang, Li Sun, Wei Fan, Jun Sun, Satoshi Naoi, Koichi Shirahata, Takuya Fukagai, Yasumoto Tomita, Atsushi Ike, Tetsutaro Hashimoto

Proceedings of the 2017 IEEE International Conference on Multimedia and Expo, 2017

2012

Voltage droop reduction for multiple-power domain SoCs with on-die LDO using output voltage boost and adaptive response scaling.

Tetsutaro Hashimoto, Satoshi Tanabe, Kouichi Nakayama, Hisanori Fujisawa

Proceedings of the International Symposium on Low Power Electronics and Design, 2012

2007

On-Die Supply-Voltage Noise Sensor with Real-Time Sampling Mode for Low-Power Processor Applications.

Tomio Sato, Atsuki Inoue, Tetsuyoshi Shiota, Tomoko Inoue, Yukihito Kawabe, Tetsutaro Hashimoto, Toshifumi Imamura, Yoshitaka Murasaka, Makoto Nagata, Atsushi Iwata

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007