Tetsushi Tanizaki

According to our database, Tetsushi Tanizaki authored at least 6 papers between 2001 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

A Scalable Massively Parallel Processor for Real-Time Image Processing.

Takashi Kurafuji, Masaru Haraguchi, Masami Nakajima, Tetsu Nishijima, Tetsushi Tanizaki, Hiroyuki Yamasaki, Takeaki Sugimura, Yuta Imai, Masakatsu Ishizaki, Takeshi Kumaki, Kan Murata, Kanako Yoshida, Eisuke Shimomura, Hideyuki Noda, Yoshihiro Okuno, Shunsuke Kamijo, Tetsushi Koide, Hans Jürgen Mattausch, Kazutami Arimoto

IEEE J. Solid State Circuits, 2011

2007

The Circuits and Robust Design Methodology of the Massively Parallel Processor Based on the Matrix Architecture.

Hideyuki Noda, Tetsushi Tanizaki, Takayuki Gyohten, Katsumi Dosaka, Masami Nakajima, Katsuya Mizumoto, Kanako Yoshida, Takenobu Iwao, Tetsu Nishijima, Yoshihiro Okuno, Kazutami Arimoto

IEEE J. Solid State Circuits, 2007

The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture.

Hideyuki Noda, Masami Nakajima, Katsumi Dosaka, Kiyoshi Nakata, Motoki Higashida, Osamu Yamamoto, Katsuya Mizumoto, Tetsushi Tanizaki, Takayuki Gyohten, Yoshihiro Okuno, Hiroyuki Kondo, Yukihiko Shimazu, Kazutami Arimoto, Kazunori Saito, Toru Shimizu

IEEE J. Solid State Circuits, 2007

2006

A Scalable ET2RAM (SETRAM) with Verify Control for SoC Platform Memory IP on SOI.

Kazutami Arimoto, Fukashi Morishita, Isamu Hayashi, Tetsushi Tanizaki, Takashi Ipposhi, Katsumi Dosaka

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2003

An embedded DRAM with a 143-MHz SRAM interface using a sense-synchronized read/write.

Yasuhiko Taito, Tetsushi Tanizaki, Mitsuya Kinoshita, Futoshi Igaue, Takeshi Fujino, Kazutami Arimoto

IEEE J. Solid State Circuits, 2003

2001

Test cost reduction by at-speed BISR for embedded DRAMs.

Yoshihiro Nagura, Michael Mullins, Anthony Sauvageau, Yoshinoro Fujiwara, Katsuya Furue, Ryuji Ohmura, Tatsunori Komoike, Takenori Okitaka, Tetsushi Tanizaki, Katsumi Dosaka, Kazutami Arimoto, Yukiyoshi Koda, Tetsuo Tada

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001