Tetsuro Tamura
According to our database1,
Tetsuro Tamura
authored at least 6 papers
between 2003 and 2021.
Collaborative distances:
Collaborative distances:
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Bibliography
2021
Development of 16 Mb NRAM Aiming for High Reliability, Small Cell Area, and High Switching Speed.
Proceedings of the IEEE International Memory Workshop, 2021
2014
A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE.
IEEE J. Solid State Circuits, 2014
3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2010
Proceedings of the 2010 Internet of Things (IOT), IoT for a green Planet, Tokyo, Japan, November 29, 2010
2003