Tetsuro Matsumoto

According to our database, Tetsuro Matsumoto authored at least 5 papers between 1989 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Characterizing SEU Cross Sections of 12- and 28-nm SRAMs for 6.0, 8.0, and 14.8 MeV Neutrons.

Kazusa Takami, Yuibi Gomi, Shin-ichiro Abe, Wang Liao, Seiya Manabe, Tetsuro Matsumoto, Masanori Hashimoto

Proceedings of the IEEE International Reliability Physics Symposium, 2023

2007

Measurement System for Switching Current Distribution in Intrinsic Josephson Junctions.

Hiromi Kashiwaya, Tetsuro Matsumoto, Hajime Shibata, Kiyoe Tani, Satoshi Kashiwaya

IEICE Trans. Electron., 2007

1989

Substrate current reduction techniques for BiCMOS DRAM.

Takayuki Kawahara, Goro Kitsukawa, Hisayuki Higuchi, Yoshiki Kawajiri, Takao Watanabe, Kiyoo Itoh, Ryoichi Hori, Yutaka Kobayashi, Tetsuro Matsumoto

IEEE J. Solid State Circuits, October, 1989

Comparison of CMOS and BiCMOS 1-Mbit DRAM performance.

Takao Watanabe, Goro Kitsukawa, Yoshiki Kawajiri, Kiyoo Itoh, Ryoichi Hori, Yoshiaki Ouchi, Takayuki Kawahara, Tetsuro Matsumoto

IEEE J. Solid State Circuits, June, 1989

A 1-Mbit BiCMOS DRAM using temperature-compensation circuit techniques.

Goro Kitsukawa, Kiyoo Itoh, Ryoichi Hori, Yoshiki Kawajiri, Takao Watanabe, Takayuki Kawahara, Tetsuro Matsumoto, Yutaka Kobayashi

IEEE J. Solid State Circuits, June, 1989