Tetsufumi Kawamura
According to our database1,
Tetsufumi Kawamura
authored at least 3 papers
between 2007 and 2011.
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Bibliography
2011
IEICE Electron. Express, 2011
2007
Selective-Capacitance Constant-Charge-Injection Programming Scheme for High-Speed Multilevel AG-AND Flash Memories.
IEICE Trans. Electron., 2007
A 126 mm<sup>2</sup> 4-Gb Multilevel AG-AND Flash Memory with Inversion-Layer-Bit-Line Technology.
IEICE Trans. Electron., 2007