Teruyoshi Komuro

According to our database, Teruyoshi Komuro authored at least 2 papers between 2008 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU.

Masayuki Ito, Kenichi Nitta, Koji Ohno, Masahito Saigusa, Masaki Nishida, Shinichi Yoshioka, Takahiro Irita, Takao Koike, Tatsuya Kamei, Teruyoshi Komuro, Toshihiro Hattori, Yasuhiro Arai, Yukio Kodama

IEEE J. Solid State Circuits, 2009

2008

A 65nm Single-Chip Application and Dual-Mode Baseband Processor with Partial Clock Activation and IP-MMU.

Masao Naruse, Tatsuya Kamei, Toshihiro Hattori, Takahiro Irita, Kenichi Nitta, Takao Koike, Shinichi Yoshioka, Koji Ohno, Masahito Saigusa, Minoru Sakata, Yukio Kodama, Yuji Arai, Teruyoshi Komuro

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008