Te-Hsuan Chen

According to our database, Te-Hsuan Chen authored at least 10 papers between 2009 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Equivalence Among Stochastic Logic Circuits and its Application to Synthesis.

Te-Hsuan Chen, John P. Hayes

IEEE Trans. Emerg. Top. Comput., 2019

2017

Achieving progressive precision in stochastic computing.

Te-Hsuan Chen, Pai-Shun Ting, John P. Hayes

Proceedings of the 2017 IEEE Global Conference on Signal and Information Processing, 2017

2016

Designing Accurate and Low-Cost Stochastic Circuits.

Te-Hsuan Chen

PhD thesis, 2016

Hardware Acceleration for Boolean Satisfiability Solver by Applying Belief Propagation Algorithm.

Te-Hsuan Chen, Ju-Yi Lu

CoRR, 2016

Design of Division Circuits for Stochastic Computing.

Te-Hsuan Chen, John P. Hayes

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015

Equivalence among stochastic logic circuits and its application.

Te-Hsuan Chen, John P. Hayes

Proceedings of the 52nd Annual Design Automation Conference, 2015

2014

Behavior of stochastic circuits under severe error conditions.

Te-Hsuan Chen, Armin Alaghi, John P. Hayes

it Inf. Technol., 2014

Analyzing and controlling accuracy in stochastic circuits.

Te-Hsuan Chen, John P. Hayes

Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

2013

Design of stochastic Viterbi decoders for convolutional codes.

Te-Hsuan Chen, John P. Hayes

Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2009

An Adaptive-Rate Error Correction Scheme for NAND Flash Memory.

Te-Hsuan Chen, Yu-Ying Hsiao, Yu-Tsao Hsing, Cheng-Wen Wu

Proceedings of the 27th IEEE VLSI Test Symposium, 2009