Tayab Din Memon

Orcid: 0000-0001-8122-5647

According to our database1, Tayab Din Memon authored at least 15 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2024
A Correlation-Less Approach Toward the Steepest-Descent-Based Adaptive Channel Equalizer.
Circuits Syst. Signal Process., April, 2024

Tracking Multiple Autonomous Ground Vehicles Using Motion Capture System Operating in a Wireless Network.
IEEE Access, 2024

Strategies and Challenges for Unmanned Aerial Vehicle-Based Continuous Inspection and Predictive Maintenance of Solar Modules.
IEEE Access, 2024

2023
An autocorrelation-less single-bit Weiner filter on FPGA.
Biomed. Signal Process. Control., September, 2023

2021
A Correlation-Less Approach Towards Adaptive Channel Equalizer Based on Wiener-Hopf Equation.
Wirel. Pers. Commun., 2021

Sigma-Delta Modulation Based Adaptive Channel Equalizer Based on Wiener-Hopf Equations.
Wirel. Pers. Commun., 2021

Sigma-Delta Modulation Based Single-bit Adaptive DSP Algorithms for Efficient Mobile Communication.
Circuits Syst. Signal Process., 2021

2020
Analyzing the Impact of Sigma-Delta Modulation on Performance Parameters of Adaptive Filters.
Wirel. Pers. Commun., 2020

Development of IOT Based Smart Instrumentation for the Real Time Structural Health Monitoring.
Wirel. Pers. Commun., 2020

2019
Design and Analysis of Single-Bit Ternary Matched Filter.
Wirel. Pers. Commun., 2019

2018
FPGA Based Implementation and Area Performance Analysis of Sigma-Delta Modulated Steepest Algorithm for Channel Equalization.
Proceedings of the 12th International Conference on Signal Processing and Communication Systems, 2018

2017
Design and analysis of linear phase FIR filter in FPGA using PSO algorithm.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

SWL algorithms optimization using alternative adder module in FPGA.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

2013
POWER-Area-Performance Characteristics of FPGA-based Sigma-Delta FIR Filters.
J. Signal Process. Syst., 2013

2012
Reconfigurable Blocks Based on Balanced Ternary.
J. Signal Process. Syst., 2012


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