Tatsuya Onuki
Orcid: 0000-0002-8874-8165
According to our database1,
Tatsuya Onuki
authored at least 10 papers
between 2012 and 2024.
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Timeline
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2024
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2024
Heterogeneous Oxide Semiconductor FETs Comprising Planar FET and Vertical Channel FETs Monolithically Stacked on Si CMOS, Enabling 1-Mbit 3D DRAM.
Proceedings of the IEEE International Memory Workshop, 2024
2023
1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Soft- and Hard-Error Radiation Reliability of 228 KB $3\mathrm{T}+1\mathrm{C}$ Oxide Semiconductor Memory.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
2017
Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS.
IEEE J. Solid State Circuits, 2017
2016
Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
2015
16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write method.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor.
Proceedings of the Symposium on VLSI Circuits, 2014
Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.
Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014
2012
Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor.
IEEE J. Solid State Circuits, 2012