Tatsuya Enomoto

According to our database, Tatsuya Enomoto authored at least 4 papers between 1983 and 1989.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1989

32-bit microprocessors based on the TRON specification.

Ken Sakamura, Tatsuya Enomoto

Microprocess. Microsystems, 1989

1988

A 32-bit Microprocessor Based on the TRON Architecture: Design of the GMICRO/100.

Tom Shimizu, Toyohiko Yoshida, Yuichi Saitoh, Masahito Matsuo, Tatsuya Enomoto

Proceedings of the COMPCON'88, Digest of Papers, Thirty-Third IEEE Computer Society International Conference, San Francisco, California, USA, February 29, 1988

1984

A Hierarchical Standard Cell Approach for Custom VLSI Design.

Takeshi Tokuda, Jiro Korematsu, Osamu Tomisawa, Sotoju Asai, Isao Ohkura, Tatsuya Enomoto

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1984

1983

Delay-Time Modeling for ED MOS Logic LSI.

Takeshi Tokuda, Kaoru Okazaki, Kazuhiro Sakashita, Isao Ohkura, Tatsuya Enomoto

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983