Tatsuo Shiozawa
Orcid: 0009-0001-6679-3950
According to our database1,
Tatsuo Shiozawa
authored at least 7 papers
between 2003 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023
Proceedings of the Proceedings 26th International Conference on Extending Database Technology, 2023
2021
Approaching DRAM performance by using microsecond-latency flash memory for small-sized random read accesses: a new access method and its graph applications.
Proc. VLDB Endow., 2021
2013
A Standard-Cell Based On-Chip NMOS and PMOS Performance Monitor for Process Variability Compensation.
IEICE Trans. Electron., 2013
2012
An area-efficient, standard-cell based on-chip NMOS and PMOS performance monitor for process variability compensation.
Proceedings of the 2012 IEEE Symposium on Low-Power and High-Speed Chips, 2012
2011
Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011
2003
IEEE J. Solid State Circuits, 2003