Tatsunori Murotani

According to our database, Tatsunori Murotani authored at least 3 papers between 1995 and 2000.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2000

A 12-ns 8-Mbyte DRAM secondary cache for a 64-bit microprocessor.

Takashi Okuda, Isao Naritake, Tadahiko Sugibayashi, Yuji Nakajima, Tatsunori Murotani

IEEE J. Solid State Circuits, 2000

1997

A four-level storage 4-Gb DRAM.

Takashi Okuda, Tatsunori Murotani

IEEE J. Solid State Circuits, 1997

1995

A 1-Gb DRAM for file applications.

Tadahiko Sugibayashi, Isao Naritake, Satoshi Utsugi, Kentaro Shibahara, Ryuichi Oikawa, Hidemitsu Mori, Shouichi Iwao, Tatsunori Murotani, Kuniaki Koyama, Shinichi Fukuzawa, Toshiro Itani, Kunihiko Kasama, Takashi Okuda, Shuichi Ohya, Masaki Ogawa

IEEE J. Solid State Circuits, November, 1995